DAC7634
www.ti.com
SBAS134A–JULY 2004–REVISED AUGUST 2004
TYPICAL PERFORMANCE CURVES: VSS = –5 V (continued)
At TA = 25°C, VDD = VCC = 5 V, VREFH = 2.5 V, VREFL = 0 V, representative unit, unless otherwise specified.
POSITIVE SUPPLY CURRENT
vs DIGITAL INPUT CODE
VOUT vs RLOAD
2
1.5
1
No Load
Source
All DACs
One DAC
Sink
–2
–3
–4
–5
0.5
0
0.001
0.01
0.1
1
10
100
1000
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
Digital Input Code
(kΩ)
RLOAD
Figure 44.
Figure 45.
OUTPUT VOLTAGE vs SETTLING TIME
(–2.5 V TO 2.5 V)
OUTPUT VOLTAGE vs SETTLING TIME
(2.5 V TO –2.5 V)
+5V
LDAC
0
+5V
LDAC
0
Large−Signal Settling Time: 1V/div
Small−Signal Settling Time: 2LSB/div
Small−Signal Settling Time:
2LSB/div
Large−Signal Settling Time: 1V/div
Time (2 µs/div)
Time (2 µs/div)
Figure 46.
Figure 47.
THEORY OF OPERATION
The DAC7634 is a quad voltage output, 16-bit digi-
tal-to-analog converter (DAC). The architecture is an
R-2R ladder configuration with the three MSBs seg-
mented, followed by an operational amplifier that
serves as a buffer. Each DAC has its own R-2R
ladder network, segmented MSBs, and output oper-
ational amplifier, as shown in Figure 48. The mini-
mum voltage output (zero-scale) and maximum volt-
age output (full-scale) are set by the external voltage
references (VREFL and VREFH, respectively).
The digital input is a 24-bit serial word that contains a
2-bit address code for selecting one of four DACs, a
quick load bit, five unused bits, and the 16-bit DAC
code (MSB first). The converters can be powered
from either a single 5-V supply or a dual ±5-V supply.
The device offers a reset function which immediately
sets all DAC output voltages and DAC registers to
mid-scale code 8000H or to zero-scale, code 0000H.
See Figure 49 and Figure 50 for the basic operation
of the DAC7634.
16
BB [ BURR-BROWN CORPORATION ]
