SIGNAL CONDITIONING
CROSSTALK
The FET switches used for the sample hold on many CMOS
A/D converters release a significant amount of charge injec-
tion which can cause the driving op amp to oscillate. The
amount of charge injection due to the sampling FET switch
on the ADS7825 is approximately 5-10% of the amount on
similar ADCs with the charge redistribution DAC (CDAC)
architecture. There is also a resistive front end which attenu-
ates any charge which is released. The end result is a
minimal requirement for the drive capability on the signal
conditioning preceding the A/D. Any op amp sufficient for
the signal in an application will be sufficient to drive the
ADS7825.
The worst-case channel-to-channel crosstalk versus input
frequency is shown in the Typical Performance Curves
section of this data sheet. With a full-scale 1kHz input
signal, worst case crosstalk on the ADS7825 is better than
–115dB. This should be adequate for even the most de-
manding applications. However, if crosstalk is a concern,
the following items should be kept in mind: The worst case
crosstalk is generally from channel 3 to 2. In addition,
crosstalk from Channel 3 to any other channel is worse than
from those channels to Channel 3. The reason for this is that
Channel 3 is nearer to the reference on the ADS7825. This
allows two coupling modes: channel-to-channel and Chan-
nel 3 to the reference. In general, when crosstalk is a
concern, avoid placing signals with higher frequency com-
ponents on Channel 3.
The resistive front end of the ADS7825 also provides a
guaranteed ±15V overvoltage protection. In most cases, this
eliminates the need for external overvoltage protection
circuitry.
The worst case crosstalk occurs from Channel 3 to Channel
2 as shown in the Crosstalk vs Input Frequency graph in the
Typical Performance Curves section. Other adjacent chan-
nels are typically several dB better than this while non-
adjacent channels are typically 10dB better. If a particular
channel should be as immune as possible from crosstalk,
channel 0 would be the best channel for the signal and
channel 1 should have the signal with the lowest frequency
content. If two signals are to have as little crosstalk as
possible, they should be placed on Channel 0 and Channel
2 with lower frequency, less-sensitive inputs on the other
channels.
INTERMEDIATE LATCHES
The ADS7825 does have tri-state outputs for the parallel
port, but intermediate latches should be used if the bus will
be active during conversions. If the bus is not active during
conversions, the tri-state outputs can be used to isolate the
A/D from other peripherals on the same bus.
Intermediate latches are beneficial on any monolithic A/D
converter. The ADS7825 has an internal LSB size of 38µV.
Transients from fast switching signals on the parallel port,
even when the A/D is tri-stated, can be coupled through the
substrate to the analog circuitry causing degradation of
converter performance.
If crosstalk is a concern for all channels, keep in mind that the
crosstalk graph shows crosstalk between any two channels.
Total crosstalk to any given channel is the sum of the
crosstalk contributions from all the other channels. Since non-
adjacent channels contribute very little, their contribution can
generally be ignored. A good approximation for absolute
worst case crosstalk would be to add 6dB to the highest curve
shown in the Crosstalk vs Input Frequency graph.
For an ADS7825 with proper layout, grounding, and bypass-
ing, the effect can be a few LSBs of error. In some cases, this
error can be treated as an increase in converter noise and
simply averaged out. In others, the error may not be random
and will produce an error in the conversion result, even with
averaging. Poor grounding, poor bypassing, and high-speed
digital signals will increase the magnitude of the errors—
possibly to many tens of LSBs.
®
ADS7825
16
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