SPECIFICATIONS
ELECTRICAL
At T
A
= –40°C to +85°C, f
S
= 800kHz, +V
DIG
= +V
ANA
= +5V, –V
ANA
= –5V, using internal reference and the 50Ω input resistor shown in Figure 4b, unless otherwise specified.
ADS7810U
PARAMETER
RESOLUTION
ANALOG INPUT
Voltage Range
Impedance
Capacitance
THROUGHPUT SPEED
Conversion Cycle
Complete Cycle
Throughput Rate
DC ACCURACY
Integral Linearity Error
Differential Linearity Error
No Missing Codes
Transition Noise
(2)
Full Scale Error
(3, 4)
Full Scale Error Drift
Full Scale Error
(3, 4)
Full Scale Error Drift
Bipolar Zero Error
(3)
Bipolar Zero Error Drift
Power Supply Sensitivity
(+V
DIG
= +V
ANA
= V
D
)
AC ACCURACY
Spurious-Free Dynamic Range
Total Harmonic Distortion
Signal-to-(Noise+Distortion)
Signal-to-Noise
Usable Bandwidth
(6)
SAMPLING DYNAMICS
Aperture Delay
Aperture Jitter
Transient Response
Overvoltage Recovery
(7)
REFERENCE
Internal Reference Voltage
Internal Reference DC Source Current
(External load should be static)
Internal Reference Drift
External Reference Voltage Range
For Specified Linearity
External Reference Current Drain
DIGITAL INPUTS
Logic Levels
V
IL
V
IH
I
IL
I
IH
DIGITAL OUTPUTS
Data Format
Data Coding
V
OL
V
OH
Leakage Current
Output Capacitance
DIGITAL TIMING
Bus Access Time
Bus Relinquish Time
t
3
+ t
4
Acquire & Convert
800
±1
±1
Guaranteed
0.1
±12
Ext. 2.5000V Ref
Ext. 2.5000V Ref
±12
±2
+4.75V < V
D
< +5.25V
–5.25V < –V
ANA
< –4.75V
f
IN
=
f
IN
=
f
IN
=
f
IN
=
250kHz
250kHz
250kHz
250kHz
74
67
68
82
–80
71
71
1.5
20
10
200
250
2.48
2.5
100
8
2.5
2.52
T
±0.5
T
±0.5
T
±8
T
±5
±0.5
77
–74
69
70
84
–82
T
T
T
T
T
T
T
T
T
T
T
T
±4
T
T
T
±0.25
±10
3.1
5
1020
1250
T
±0.75
T
CONDITIONS
MIN
TYP
MAX
12
T
T
T
T
T
MIN
ADS7810UB
TYP
MAX
T
UNITS
Bits
V
kΩ
pF
ns
ns
kHz
LSB
(1)
LSB
LSB
%
ppm/°C
%
ppm/°C
LSB
ppm/°C
LSB
LSB
dB
(5)
dB
dB
dB
MHz
ns
ps
ns
ns
V
µA
ppm/°C
V
µA
–77
FS Step
2.3
Ext. 2.5000V Ref
2.7
100
T
T
T
T
–0.3
+2.4
V
IL
= 0V
V
IH
= 5V
+0.8
V
D
+ 0.3
±10
±10
T
T
T
T
T
T
V
V
µA
µA
I
SINK
= 1.6mA
I
SOURCE
= 500µA
High-Z State,
V
OUT
= 0V to V
DIG
High-Z State
+2.8
Parallel 12 Bits
Binary Two’s Complement
+0.4
T
±5
15
62
83
T
T
15
T
T
V
V
µA
pF
ns
ns
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
ADS7810
2
BURR-BROWN [ BURR-BROWN CORPORATION ]
