amount of charge injection due to the sampling FET switch
on the ADS7807 is approximately 5% to 10% of the amount
on similar A/D converters with the charge redistribution
Digital-to-Analog Converter (DAC) CDAC architecture. There
is also a resistive front end which attenuates any charge
which is released. The end result is a minimal requirement for
the drive capability on the signal conditioning preceding the
A/D converter. Any op amp sufficient for the signal in an
application will be sufficient to drive the ADS7807.
581
The resistive front end of the ADS7807 also provides a speci-
fied ±25V over-voltage protection. In most cases, this elimi-
nates the need for external over-voltage protection circuitry.
176
173
INTERMEDIATE LATCHES
The ADS7807 does have tri-state outputs for the parallel
port, but intermediate latches should be used if the bus will
be active during conversions. If the bus is not active during
conversion, the tri-state outputs can be used to isolate the
A/D converter from other peripherals on the same bus.
52
18
0001H 0002H
0
0
FFFDH FFFEH FFFFH 0000H
0003H
Intermediate latches are beneficial on any monolithic A/D
converter. The ADS7807 has an internal LSB size of 38µV.
Transients from fast switching signals on the parallel port,
even when the A/D converter is tri-stated, can be coupled
through the substrate to the analog circuitry causing degra-
dation of converter performance.
FIGURE 12. Histogram of 1000 Conversions with Input Grounded.
5671
APPLICATIONS INFORMATION
TRANSITION NOISE
Apply a DC input to the ADS7807 and initiate 1000 conver-
sions. The digital output of the converter will vary in output
codes due to the internal noise of the ADS7807. This is true
for all 16-bit SAR converters. The transition noise specifica-
tion found in the electrical characteristics section is a statis-
tical figure which represents the one sigma limit or rms value
of these output codes.
2010
1681
176
Using a histogram to plot the output codes, the distribution
should appear bell-shaped with the peak of the bell curve
representing the nominal output code for the input voltage
value. The ±1σ, ±2σ, and ±3σ distributions will represent
68.3%, 95.5%, and 99.7% of all codes. Multiplying TN by 6
will yield the ±3σ distribution or 99.7% of all codes. Statisti-
cally, up to 3 codes could fall outside the 5 code distribution
when executing 1000 conversions. The ADS7807 has a TN
of 0.8LSBs which yields 5 output codes for a ±3σ distribution.
Figures 12 and 13 show 1000 and 10000 conversion histo-
gram results.
438
182
0001H 0002H
18
0
FFFDH FFFEH FFFFH 0000H
0003H
FIGURE 13. Histogram of 10000 Conversions with Input Grounded.
the number of averages. For example, averaging four con-
version results will reduce the TN by 1/2 to 0.4LSBs. Aver-
aging should only be used for input signals with frequencies
near DC.
AVERAGING
For AC signals, a digital filter can be used to low-pass filter
and decimate the output codes. This works in a similar
manner to averaging: for every decimation by 2, the signal-
to-noise ratio will improve 3dB.
The noise of the converter can be compensated by averag-
ing the digital codes. By averaging conversion results, tran-
sition noise will be reduced by a factor of 1/√Hz where n is
ADS7807
SBAS022C
17
www.ti.com
BB [ BURR-BROWN CORPORATION ]
