tHEC
CE
CS
CE
CS
tSSR
tHSR
tSSC
tSRC
tHSC
tHRR
R/C
R/C
tHRC
tSRR
A
0
A
0
tSAC
tHAC
tDSC
tSAR
tHAR
Status
Status
tX*
High Impedance
DB11-DB0
tHS
tHD
DB11-DB0
High-Z
tDD
Data Valid
* tX includes tAQ + tC in ADC574
Emulation Mode, tC only in S/H Control Mode.
tHL
FIGURE 6. Read Cycle Timing.
FIGURE 5. Conversion Cycle Timing.
Word 1
Word 2
Processor
Converter
DB7 DB6
DB5
DB9
DB4
DB8
DB3
DB7
DB2
DB6
DB1
DB5
DB0
DB4
DB7 DB6
DB3 DB2
DB5
DB1
DB4
DB0
DB3
0
DB2
0
DB1
0
DB0
DB11 DB10
0
FIGURE 7. 12-Bit Data Format for 8-Bit Systems.
STATUS 28
2
4
12/8
AO
DB11 (MSB) 27
26
25
24
23
22
AO
Address
Bus
Data
Bus
ADS574
21
20
19
18
17
DB0 (LSB) 16
Digital Common 15
FIGURE 8. Connection to an 8-Bit Bus.
®
10
ADS574