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SBAS308A− MAY 2004 − REVISED MARCH 2005
rate described in the timing diagram of Figure 1. Care
should be taken to ensure that all output lines (including
CLKOUT) have nearly the same load as D2 (pin 51).
This circuit also reduces the sensitivity of the output
timing versus supply voltage or temperature. Placing
external resistors in series with the outputs is not
recommended.
The ADS5542 internal registers default to all zeros on
reset. The device is reset by applying a high pulse on
the RESET pin (pin 35) for a minimum of 2µs at least
10ms after both the AV and DRV power supplies
DD
DD
have come up (as illustrated in Figure 2) In reset, the
ADC outputs are forced low. Note that the RESET pin
has a 200kΩ pull-up resistor to AV
.
DD
The timing characteristics of the digital outputs change
for sampling rates below the 80MSPS maximum
sampling frequency. Table 5 shows the timing
parameters for sampling rates of 20MSPS, 40MSPS,
and 65MSPS.
If the ADS5542 is to be used solely in the default mode
set at reset, the serial interface pins can be tied to fixed
voltages. In this case, tie SCLK high, SEN low, and
SDATA to either a high or low voltage.
To use the input clock as the data capture clock, it is
PowerPAD Package
necessary to delay the input clock by a delay, t , that
d
The PowerPAD package is a thermally-enhanced
standard size IC package designed to eliminate the use
of bulky heatsinks and slugs traditionally used in
thermal packages. This package can be easily mounted
using standard PCB assembly techniques, and can be
removed and replaced using standard repair
procedures.
results in the desired setup or hold time. Use either of
the following equations to calculate the value of t .
d
Desired setup time = t − t
d
START
Desired hold time = t
− t
d
END
SERIAL PROGRAMMING INTERFACE
The PowerPAD package is designed so that the
leadframe die pad (or thermal pad) is exposed on the
bottom of the IC. This provides an extremely low
thermal resistance path between the die and the
exterior of the package. The thermal pad on the bottom
of the IC can then be soldered directly to the PCB, using
the PCB as a heatsink.
The ADS5542 has internal registers that enable the
programming of the device into modes as described in
previous sections. Programming is done through a
3-wire serial interface. The timing diagram and register
settings in the Serial Programming Interface section
describe the use of this interface.
Table 2 shows the different modes and the bit values to
be written to the register to enable them.
Table 5. Timing Characteristics at Additional Sampling Frequencies
fS
(MSPS)
tSETUP (ns)
tHOLD (ns)
tSTART (ns)
tEND (ns)
tRISE (ns)
tFALL (ns)
TYP
MIN
4.3
8.5
TYP
5.7
MAX
MIN
2
TYP
MAX
MIN
TYP
MAX
MIN
8.3
8.9
9.5
TYP
MAX
MIN
TYP
MAX
7.2
8
MIN
MAX
6.4
7.8
8
65
40
20
3
2.8
−1
4.5
1.5
2
11.8
14.5
21.6
6.6
7.5
7.5
5.5
11.0
2.6
2.5
3.5
4.7
7.3
17.0 25.7
−9.8
8
7.6
26