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ADS5510IPAPG4 参数 Datasheet PDF下载

ADS5510IPAPG4图片预览
型号: ADS5510IPAPG4
PDF下载: 下载PDF文件 查看货源
内容描述: 11位, 125 MSPS模拟数字转换器 [11-Bit, 125-MSPS Analog-To-Digital Converter]
分类和应用: 转换器
文件页数/大小: 30 页 / 996 K
品牌: BB [ BURR-BROWN CORPORATION ]
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ADS5510  
www.ti.com  
SLAS499JANUARY 2007  
Table 8. Timing Characteristics at Additional Sampling Frequencies (DLL OFF)  
CLKOUT Jitter,  
Peak-to-Peak  
tJIT (ps)  
CLKOUT, Rise Time  
tr (ns)  
CLKOUT, Fall Time  
tf (ns)  
Input-to-Output Clock Delay  
tPDI (ns)  
fS  
(MSPS)  
MIN  
TYP  
2.5  
3.1  
4.8  
8.3  
MAX  
MIN  
TYP  
2.1  
2.6  
4
MAX  
MIN  
TYP  
210  
260  
445  
800  
MAX  
MIN  
7.1  
7.8  
9.5  
13  
TYP  
8
MAX  
8.9  
80  
65  
40  
20  
10  
2
2.8  
3.5  
5.3  
9.5  
2.3  
2.9  
4.4  
8.2  
315  
380  
8.5  
9.4  
650  
10.4  
15.5  
20.7  
551  
11.4  
18  
7.6  
1200  
16  
25.5  
567  
31  
52  
36  
65  
2610  
4400  
537  
SERIAL PROGRAMMING INTERFACE  
The ADS5510 has internal registers for the programming of some of the modes described in the previous  
sections. The registers should be reset after power-up by applying a 2 µs (minimum) high pulse on RESET (pin  
35); this also resets the entire ADC and sets the data outputs to low. This pin has a 200-kinternal pullup  
resistor to AVDD. The programming is done through a three-wire interface. The timing diagram and serial  
register setting in the Serial Programing Interface section describe the programming of this register.  
Table 2 shows the different modes and the bit values to be written to the register to enable them.  
Note that some of these modes may modify the standard operation of the device and possibly vary the  
performance with respect to the typical data shown in this data sheet.  
Applying a RESET signal is must to set the internal registers to their default states for normal operation. If the  
hardware RESET function is not used in the system, the RESET pin must be tied to ground and it is necessary  
to write the default values to the internal registers through the serial programming interface. The registers must  
be written in the following order.  
Write 9000h (Address 9, Data 000)  
Write A000h (Address A, Data 000)  
Write B000h (Address B, Data 000)  
Write C000h (Address C, Data 000)  
Write D000h (Address D, Data 000)  
Write E000h (Address E, Data 804)  
Write 0000h (Address 0, Data 000)  
Write 1000h (Address 1, Data 000)  
Write F000h (Address F, Data 000)  
NOTE:  
This procedure is only required if a RESET pulse is not provided to the device.  
25  
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