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ADS5220PFBT 参数 Datasheet PDF下载

ADS5220PFBT图片预览
型号: ADS5220PFBT
PDF下载: 下载PDF文件 查看货源
内容描述: 12位, 40MSPS采样, + 3.3V模拟数字转换器 [12-Bit, 40MSPS Sampling, +3.3V ANALOG-TO-DIGITAL CONVERTER]
分类和应用: 转换器
文件页数/大小: 20 页 / 432 K
品牌: BB [ BURR-BROWN CORPORATION ]
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ELECTRICAL CHARACTERISTICS: AVDD = 3.3V  
TMIN = 40°C, TMAX = +85°C, typical values are at TA = +25°C, sampling rate = 40MSPS, 50% clock duty cycle, AVDD = 3.3V, DVDD = 3.3, VDRV = 2.5V, 1dBFS, DCA  
off, internal reference voltage, and 2VPP differential input, unless otherwise noted.  
ADS5220  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
DIGITAL INPUTS  
CMOS-Compatible  
Logic Family  
Rising Edge of Convert Clock  
Convert Command  
Start Conversion  
High Level Input Current(5) (VIN = 3VDD  
Low Level Input Current (VIN = 0V)  
High Level Input Voltage  
Low Level Input Voltage  
Input Capacitance  
)
100  
µA  
µA  
V
V
pF  
10  
+1.7  
+0.7  
5
DIGITAL OUTPUTS  
Logic Family  
Logic Coding  
CMOS-Compatible  
Straight Offset Binary or BTC  
Low Output Voltage (IOL = 50µA to 1.5mA)  
High Output Voltage (IOH = 50µA to 0.5mA)  
3-State Enable Time  
3-State Disable Time  
Output Capacitance  
VDRV = 2.5V  
+0.1  
V
V
ns  
ns  
pF  
+2.4  
OE = H  
OE = L  
20  
2
5
40  
10  
ACCURACY (Internal Reference, 2VPP  
unless otherwise noted)  
Zero Error (referred to midscale)  
Zero Error Drift (referred to midscale)  
Gain Error(6)  
,
fIN = 2.4MHz, at 25°C  
fIN = 2.4MHz  
at 25°C  
±0.75  
5
±0.4  
38  
±1.5  
±3.0  
%FS  
ppm/°C  
%FS  
ppm/°C  
dB  
Gain Error Drift  
Power-Supply Rejection of Gain  
VS = ±5%  
52  
INTERNAL VOLTAGE REFERENCE  
Output Voltage Error (1V)  
Load Regulation at 1mA  
Output Voltage Error (0.5V)  
Load Regulation at 0.5mA  
±10mV  
0.15%  
±5mV  
0.1%  
mV  
mV  
POWER-SUPPLY REQUIREMENTS  
Supply Voltage: AVDD, DVDD  
Driver Supply Voltage  
Supply Current: +IS  
Power Dissipation: VDRV = 2.5V  
VDRV = 3.3V  
Operating  
+3.0  
+2.3  
+3.3  
2.5  
59  
195  
200  
15  
+3.6  
+3.6  
V
V
Operating (External Reference)  
mA  
mW  
mW  
mW  
mW  
215  
Standard Power-Down  
Quasi-Power-Down  
75  
Thermal Resistance, θJA  
TQFP-48  
QFN-48  
63.7  
26.1  
°C/W  
°C/W  
NOTES: (1) Spurious-Free Dynamic Range refers to the magnitude of the largest harmonic.  
(2) dBFS means dB relative to Full-Scale.  
(3) 2-tone intermodulation distortion is referred to the largest fundamental tone. This number will be 6dB higher if it is referred to the magnitude of the two-  
tone fundamental envelope.  
(4) Effective Number of Bits (ENOB) is defined by (SINAD 1.76)/6.02.  
(5) A 50kpull-down resistor is inserted internally on the  
pin.  
OE  
(6) Includes internal reference.  
ADS5220  
SBAS261A  
3
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