SOURCE CURRENT
30
25
20
15
10
5
A
IN3N
AIN2P
IN2N
AIN1P
IN1N
A
IN3P
AIN4N
IN4P
+5V
R1
49.9kΩ
A
A
–40°C
25°C
85°C
REFIN
REFOUT
AVDD
REF1004
+2.5V
A
1.0µF
+5V
AGND
VBIAS
CS
AVDD
+5V
ADS1211U, P
MODE
DRDY
SDOUT
SDIO
+5V
+5V
VOH
C1
12pF
DSYNC
XIN
VOH
0V
P1
XTAL
2kΩ
XOUT
DGND
SCLK
C2
12pF
DVDD
+5V
DGND
0
0
1
2
3
4
5
DGND
V
OH (V)
FIGURE 34. Source Current vs VOH for SDOUT Under Worst-Case Conditions.
SINK CURRENT
30
A
A
A
A
A
IN3N
A
IN3P
IN4N
IN4P
+5V
IN2P
IN2N
IN1P
IN1N
A
25°C
R1
49.9kΩ
–40°C
25
20
15
10
5
A
REFIN
REFOUT
AVDD
85°C
REF1004
+2.5V
1.0µF
0V
AGND
VBIAS
CS
AVDD
+5V
ADS1211U, P
MODE
DRDY
SDOUT
SDIO
+5V
C1
+5V
DSYNC
XIN
VOL
12pF
VOL
0V
P1
2kΩ
XTAL
XOUT
DGND
SCLK
C2
DVDD
+5V
0
DGND
12pF
0
1
2
3
4
5
DGND
V
OL (V)
FIGURE 35. Sink Current vs VOL for SDOUT Under Worst-Case Conditions.
voltage is 5V and the output format is Offset Binary
(FFFFFFH). For sink current, the worst-case condition oc-
curs when the analog input differential voltage is 0V and the
output format is Two’s Complement (000000H).
Note that an asynchronous DSYNC input may cause mul-
tiple converters to be different from one another by one XIN
clock cycle. This should not be a concern for most applica-
tions. However, the Timing section contains information on
exactly synchronizing multiple converters to the same XIN
clock cycle.
Note that SDOUT is tri-stated for the majority of the
conversion period and the opto-isolator connection must
take this into account.
tDATA
Synchronization of Multiple Converters
DRDY A
The DSYNC input is used to synchronize the output data of
multiple ADS1210/11s. Synchronization involves configur-
ing each ADS1210/11 to the same Decimation Ratio and
Turbo Mode setting, and providing a common signal to the
XIN inputs. Then, the DSYNC signal is pulsed LOW (see
Figure 22 in the Timing section). This results in an internal
reset of the modulator count for the current conversion.
Thus, all the converters start counting from zero at the same
time, producing a DRDY LOW signal at approximately the
same point (see Figure 36).
tDATA
DRDY B
tDATA
DRDY C
DSYNC
tDATA
FIGURE 36. Effect of Synchronization on Output Data
Timing.
ADS1210, ADS1211
34
SBAS034B
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