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AZ100LVE111E 参数 Datasheet PDF下载

AZ100LVE111E图片预览
型号: AZ100LVE111E
PDF下载: 下载PDF文件 查看货源
内容描述: ECL / PECL 1 : 9差分时钟驱动器与启用 [ECL/PECL 1:9 Differential Clock Driver with Enable]
分类和应用: 时钟驱动器
文件页数/大小: 6 页 / 104 K
品牌: AZM [ ARIZONA MICROTEK, INC ]
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AZ10LVE111E  
AZ100LVE111E  
100K PECL DC Characteristics (VEE = GND, VCC = VCCO = +5.0V)  
-40°C  
Typ  
3995  
3305  
0°C  
Typ  
4045  
3295  
25°C  
Typ  
4045  
3295  
85°C  
Typ  
4045  
3295  
Symbol  
Characteristic  
Unit  
Min  
3915  
3170  
3835  
3190  
3620  
Max  
4120  
3445  
4120  
3525  
3740  
150  
Min  
3975  
3190  
3835  
3190  
3620  
Max  
4120  
3380  
4120  
3525  
3740  
150  
Min  
3975  
3190  
3835  
3190  
3620  
Max  
4120  
3380  
4120  
3525  
3740  
150  
Min  
3975  
3190  
3835  
3190  
3620  
Max  
4120  
3380  
4120  
3525  
3740  
150  
VOH  
VOL  
VIH  
VIL  
VBB  
IIH  
Output HIGH Voltage1,2  
Output LOW Voltage1,2  
Input HIGH Voltage1  
Input LOW Voltage1  
Reference Voltage1  
Input HIGH Current  
Input LOW Current  
Power Supply Current  
mV  
mV  
mV  
mV  
mV  
μA  
0.5  
0.5  
0.5  
0.5  
IIL  
IEE  
μA  
mA  
48  
60  
48  
60  
48  
60  
55  
69  
1.  
2.  
For supply voltages other that 5.0V, use the ECL table values and ADD supply voltage value.  
Each output is terminated through a 50Ω resistor to VCC – 2V.  
AC Characteristics (VEE = -3.0V to -5.5V, VCC = VCCO = GND or VEE = GND, VCC = VCCO = +3.0 to +5.5V)  
-40°C  
Typ  
0°C  
Typ  
25°C  
Typ  
85°C  
Typ  
Symbol  
Characteristic  
Unit  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
Propagation Delay  
to Output  
IN (Diff)1  
380  
280  
400  
400  
250  
50  
650  
700  
900  
900  
460  
410  
450  
450  
200  
0
560  
610  
850  
850  
480  
430  
450  
450  
200  
0
580  
630  
850  
850  
510  
460  
450  
450  
200  
0
610  
660  
850  
850  
tPLH / tPHL  
IN (SE)2  
Enable3  
Disable3  
ps  
tS  
tH  
tR  
tskew  
Setup Time E¯N¯ to IN5  
0
0
0
0
ps  
ps  
ps  
ps  
mV  
Hold Time  
IN to E¯N¯ 6  
-200  
100  
25  
-200  
100  
25  
-200  
100  
25  
-200  
100  
25  
Release Time E¯N¯ to IN7  
Within-Device Skew4  
350  
300  
300  
300  
75  
50  
50  
50  
VPP (AC) Minimum Input Swing8  
250  
250  
250  
250  
VEE  
1.8  
+
VCC  
0.4  
-
VEE  
1.8  
+
VCC  
0.4  
-
VEE  
1.8  
+
VCC  
0.4  
-
VEE  
1.8  
+
VCC  
0.4  
-
VCMR  
Common Mode Range9  
V
tr / tf  
1.  
Rise/Fall Time  
250  
650  
275  
600  
275  
600  
275  
600  
ps  
The differential propagation delay is defined as the delay from the crossing point of the differential input signals to the crossing point of the  
differential output signals.  
2.  
3.  
The single-ended propagation delay is defined as the delay from the 50% point of the input signal to the 50% point of the output signal.  
Enable is defined as the propagation delay from the 50% point of a negative transition on E¯N¯ to the 50% point of a positive transition on Q (or a  
negative transition on Q¯). Disable is defined as the propagation delay from the 50% point of a positive transition on E¯N¯ to the 50% point of a  
negative transition on Q (or a positive transition on Q¯).  
4.  
5.  
The within-device skew is defined as the worst-case difference between any two similar delay paths within a single device.  
The setup time is the minimum time that E¯N¯ must be asserted prior to the next transition of IN/I¯N¯ to prevent an output response greater than  
±75mV to that IN/I¯N¯ transition (see Figure 1).  
6.  
7.  
8.  
9.  
The hold time is the minimum time that E¯N¯ must remain asserted after a negative going IN or a positive going I¯N¯ to prevent an output response  
greater than ±75 mV to that IN/I¯N¯ transition (see Figure 2).  
The release time is the minimum time that E¯N¯ must be de-asserted prior to the next IN/I¯N¯ transition to ensure an output response that meets the  
specified IN to Q propagation delay and output transition times (see Figure 3).  
VPP is defined as the minimum peak-to-peak differential input swing for which AC parameters are guaranteed. The VPP(min) is AC limited for the  
LVE111E, because differential input as low as 50 mV will still produce full ECL levels at the output.  
VCMR is defined as the range within which the VIH level may vary, with the device still meeting the propagation delay specification. The VIL level  
must be such that the peak-to-peak voltage is less than 1.0 V and greater than or equal to VPP(min).  
IN  
IN  
IN  
IN  
IN  
IN  
H
EN  
EN  
EN  
November 2006 * REV - 4  
www.azmicrotek.com  
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