PD035QU2
5. Input / Output Terminals
5-1) TFT-LCD Panel Driving
Pin No.
1
Symbol
VBL-
Function
Backlight LED Ground
Backlight LED Ground
Backlight LED Power
Backlight LED Power
Top electrode
Remark
2
VBL-
VBL+
VBL+
Y1
3
4
5
6
X1
NC
Right electrode
Note Use
Hardware Reset
7
8
/RESET
SPENA
SPCLK
SPDAT
B0
9
SPI Interface Data Enable Signal
SPI Interface Data Clock
SPI interface Data
Blue Data Bit 0
Note 5-3
Note 5-3
Note 5-3
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
B1
B2
Blue Data Bit 1
Blue Data Bit 2
B3
B4
Blue Data Bit 3
Blue Data Bit 4
B5
B6
Blue Data Bit 5
Blue Data Bit 6
B7
G0
Blue Data Bit 7
Green Data Bit0
G1
G2
Green Data Bit 1
Green Data Bit 2
Green Data Bit 3
Green Data Bit 4
Green Data Bit 5
Green Data Bit 6
Green Data Bit 7
Red Data Bit 0 / DX 0
Red Data Bit 1/ DX 1
Red Data Bit 2/ DX 2
Red Data Bit 3/ DX 3
Red Data Bit 4/ DX 4
Red Data Bit 5/ DX 5
Red Data Bit 6/ DX 6
Red Data Bit 7/ DX 7
Horizontal Sync Input
Vertical Sync Input
Dot Data Clock
G3
G4
G5
G6
G7
R0
Note 5-4
Note 5-4
Note 5-4
Note 5-4
Note 5-4
Note 5-4
Note 5-4
Note 5-4
R1
R2
R3
R4
R5
R6
R7
HSYNC
VSYNC
DCLK
NC
Not Use
Not Use
NC
Vcc
Vcc
Y2
Digital Power
Digital Power
Bottom electrode
Left electrode
Internal test use
X2
NC
NC
NC
Not Use
Internal Test Use
Control The Input Data Format / Floating
Control The Input Data Format
Control The Input Data Format
SEL2
SEL1
SEL0
Note 5-1
Note 5-1,5
Note 5-1,5
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reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd.PAGE:6
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