3.3 Interface Pin Function
Table 5
Description
NO SYMBOL
I/O
1
2
3
4
NC
NC
NC
NC
This is the liquid crystal alternating current signal I/O terminal
M/S = “H”: Output
I/O
I/O
I/O
M/S = “H”: Input
5
6
7
FR
CL
When the NT7532 chip is used in master/slave mode, the
various FR terminals must be connected.
This is the display clock input terminal. When the NT7532 chips
are used in master/slave mode, the various CL terminals
must be connected.
This is the liquid crystal display blanking control terminal.
M/S = “H”: Output
M/S = “H”: Input
/DOF
When the NT7532 chip is used in master/slave mode, the
various DOF terminals must be connected.
8
9
NC
/CS1
CS2
RES
NC
This is the chip select signal. When CS1=“L” and CS2=“H”, then
the chip select becomes active, and data/command I/O is
enabled.
I
I
I
10
11
When RES is set to “L”, the settings are initialized. The reset
operation is performed by the RES signal level
This is connected to the least significant bit of the normal MPU
address bus, and it determines whether the data bits are data
or a command.
A0 = “H”: Indicate that D0 to D7 are display data
A0 = “L”: Indicates that D0 to D7 are control data
When connected to an 8080 MPU, this is active LOW. This
terminal connects to the 8080 MPU WR signal. The signals
on the data bus are latched at the rising edge of the WR signal.
When connected to a 6800 Series MPU, this is the read/write
control signal input terminal.
12
13
A0
RD/WR
I
When W R/ = “H”: Read
When W R/ = “L”: Write
When connected to an 8080 MPU, it is active LOW. This pad is
connected to the RD signal of the 8080MPU, and the
NT7532 data bus is in an output status when this signal is “L”.
When connected to a 6800 Series MPU, this is active HIGH.
This is used as an enable clock input of the 6800 series MPU
This is an 8-bit bi-directional data bus that connects to an 8-bit
or 16-bit standard MPU data bus.
14
15
E/RD
D0
I
I/O
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