AUSTIN SEMICONDUCTOR, INC.
FLASH
AS8FLC2M32
Austin Semiconductor, Inc.
READ Operations
Parameter
Speed Options
JEDEC
tAVAV
Std
Description
Test Setup
70
90
100 120 Unit
Read Cycle Time1
tRC
Min
70
90
100 120
CE# = VIL
tAVQV
tACC
Address to Output Delay
OE# = VIL
Max
70
90
100 120
100 120
tELQV
tGLQV
tEHQZ
tGHQZ
tCE
tOE
Chip Enable to Output Delay
Output Enable to Output Delay
OE# = VIL
Max
Max
Max
Max
Min
Min
Min
70
30
90
35
35
40
Chip Enable to Output High Z1
tDF
16
16
20
0
ns
Output Enable to Output High Z1
tDF
tSR/W
Latency Between Read and Write Operations
Read
Output Enable Hold Time1
tOEH
Toggle and Data# Polling
10
Output Hold Time From Addresses, CE# or OE#,
Whichever Occurs First1
tAXQX
tOH
Min
0
Notes:
1. Not 100% Tested
READ Operations Timing
t
RC
Addresses Stable
Addresses
CE#
t
ACC
t
DF
t
OE
OE#
t
SR/W
t
OEH
WE#
t
CE
t
OH
HIGH Z
HIGH Z
Output Valid
Outputs
RESET#
RY/BY#
0 V
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8FLC2M32B
Rev. 1.2 5/09
19
AUSTIN [ AUSTIN SEMICONDUCTOR ]
