AS4SD16M72PBG-s/IT,ET,XT
16M x 72, SDR SDRAM, 3.3v Core/ 3.3v IO
Mode Register Definition
A12 A11 A10 A9 A8
A7
A6
A5
A4 A3
A2
A1
A0
ADDRESS BUS
MODE REGISTER (Mx)
12
11
10
9
8
7
6
5
4
3
2
1
0
Burst Length
Unused Reserved WB Op Mode
CAS Latency
BT
Burst Length
M6 M5 M4
CAS Latency
Reserved
Reserved
2
M2 M1 M0
M3=0
M3=1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1
2
4
8
1
2
4
8
3
Reserved
Reserved
Reserved
Reserved
Reserved Reserved
Reserved Reserved
Reserved Reserved
Full Page Reserved
M3
0
Burst Type
Sequential
Interleaved
1
M8 M7 M6 – M0
Operating Mode
0
1
0
0
Valid
Valid
Normal Operation
Normal Operation / Reset DLL
M9
0
Operating Mode
Normal Operation
Single Location Access
1
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