iPEM
4.8 Gb SDRAM-DDR2
Austin Semiconductor, Inc.
AS4DDR264M72PBG1
DC OPERATING CONDITIONS
Parameter
Symbol
MIN
TYP
1.8
MAX
1.9
Units
Notes
VCC
Supply Voltage
1.7
V
V
V
VREF
VTT
I/O Reference Voltage
I/O Termination Voltag
0.49 x VCC
VREF - 0.04
0.50 x VCC
VREF
0.51 x VCC
VREF + 0.04
1
2
1. VREF is expected to equal VCC/2 of the transmitting device and to track variations in the DC level of the same. Peak-to-peak noise on VREF may not exceed 1 percent of the DC value. Peak-to-
peak AC noise on VREF may not exceed 2 percent of VREF. This measurement is to be taken at the
nearest VREF bypass capacitor.
2. VTT is not applied directly to the device. VTT is a system supply for signal termination resistors, is expected to be set equal to VREF and must track
variations in the DC level of VREF.
ABSOLUTE MAXIMUM RATINGS
Symbol
VCC
Parameter
Voltage on VCC pin relative to V SS
Voltage on any pin relative to V SS
Storage Temperature
Min
-1.0
Max
2.3
Unit
V
VIN, VOUT
TSTG
-0.5
2.3
V
oC
oC
-55.0
-55.0
125.0
125.0
TCASE
Device Operating Temperature
ADDR, BAx
-10.0
-5
10.0
5
uA
RAS\, CAS\, WE\, CS\,
CKE, DM, DQS, DQS\,
RDQS
uA
Input Leakage current; Any input 0V<VIN<VCC
;
II
VREF = .5XVCC; Other balls not under test = 0V
CK, CK\
DM
-5
-5
5
5
uA
uA
OV VOUT VDD, DQ & ODT Disabled
IOZ
-5
5
uA
uA
IVREF
VREF Leakage Current
-10
10
INPUT / OUTPUT CAPACITANCE
TA = 25oC, f = 1 MHz, VCC = 1.8V
Parameter
Symbol
Max
Unit
CADDR
Input capacitance (A0-A12, BA0-BA2, CS\, RAS\, CAS\, WE\, CKE, ODT)
Input capacitance CK, CK#
25
8
pF
CIN2
CIN3
pF
pF
pF
Input capacitance DM, DQS, DQS#
10
12
COUT
Input capacitance DQ0-71
Austin Semiconductor, Inc.
●
Austin, Texas
●
512.339.1188
●
www.austinsemiconductor.com
AS4DDR264M72PBG1
Rev. 3.0 6/09
21