COTS PEM
BOOT SECTOR FLASH
Austin Semiconductor, Inc.
AS29LV016J
DEVICE BUS OPERATIONS
This section describes the requirements and use of the device bus operations, which are initiated through the internal
command register. The command register itself does not occupy any addressable memory location. The register is composed
of latches that store the commands, along with the address and data information needed to execute the command. The
contents of the register serve as inputs to the internal state machine. The state machine outputs dictate the function of the
device. Table 1 lists the device bus operations, the inputs and control levels they require, and the resulting output. The
following subsections describe each of these operations in further detail.
Table 1: AS29LV016J Device Bus Operations
DQ8-DQ15
DQ0-
DQ7
DOUT
BYTE#
=VIH
BYTE#
=VIL
Address1
AIN
Operation
CE#
L
OE#
L
WE#
H
RESET#
WP#
X
DOUT
Read
H
H
DQ8-DQ14= High Z,
DQ15=A-1
AIN
Write
L
H
L
(Note 3)
(Note 4) (Note 4)
Standby
Vcc 0.3V
X
H
X
X
H
X
Vcc 0.3V
X
X
X
X
X
X
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
Output Disable
Reset
L
H
L
X
Sector Protect2,3
VID
L
H
L
(Note 4)
(Note 4)
X
X
X
Sector Address,
A6=L, A1=H, A0=L
Sector Address,
A6=H, A3=A2=L,
A1=H, A0=L
AIN
Sector Unprotect2.3
Temporary Sector Unprotect
Legend:
VID
VID
L
H
X
L
H
X
X
X
(Note 4) (Note 4)
High-Z
L= Logic Low = VIL , H=Logic High=V IH , V ID =12.0 0.ꢀV, ꢁ=Donꢂt Care, AIN =Address In, DIN = Data In, DOUT =Data Out
Notes:
1. Addresses are A19:A0 in word mode (BYTE# = VIH ), A19:A-1 in byte mode (BYTE# = VIL
)
2. The sector protect and sector unprotect functions may also be implemented via programming equipment. See Sector Protection /
Unprotection on page 11.
3. If WP# = VIL, the outermost sector remains protected (determined by device configuration). If WP# = VIH, the outermost sector protection
depends on whether the sector was last protected or unprotected using the method described in Section 7.10, Sector Group Protection/
Unprotection on page 21. The WP# contains an internal pull-up; when unconnected, WP is at VIH.
4. DIN or DOUT as required by command sequence, data polling, or sector group protection algorithm.
WORD / BYTE CONFIGURATION
The BYTE# pin controls whether the device data I/O pins DQ15–DQ0 operate in the byte or word configuration. If the BYTE#
pin is set at logic 1, the device is in word configuration, DQ15–DQ0 are active and controlled by CE# and OE#.
If the BYTE# pin is set at logic 0, the device is in byte configuration, and only data I/O pins DQ0–DQ7 are active and controlled
by CE# and OE#. The data I/O pins DQ8–DQ14 are tri-stated, and the DQ15 pin is used as an input for the LSB (A-1) address
function.
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS29LV016J
Rev. 0.0 02/09
6
AUSTIN [ AUSTIN SEMICONDUCTOR ]
