FLASH
AS29F010
Austin Semiconductor, Inc.
GENERAL DESCRIPTION
The AS29F0±0 iꢃ r ±Mbia, 5.0 Vpla-pnlꢄ FLASH mempꢂꢄ
Device eꢂrꢃsꢂe pccsꢂꢃ bꢄ execsaing ahe eꢂrꢃe cpmmrnd
pꢂgrnized rꢃ ±3±,072 bꢄaeꢃ. The AS29F0±0 iꢃ pffeꢂed in r 32-ꢁin ꢃeqsence. Thiꢃ invpkeꢃ ahe Embedded Eꢂrꢃe rlgpꢂiahm -- rn
CDIP ꢁrckrge. The bꢄae-oide drar rꢁꢁerꢂꢃ pn DQ0-DQ7. The inaeꢂnrl rlgpꢂiahm ahra rsapmraicrllꢄ ꢁꢂeꢁꢂpgꢂrmꢃ ahe rꢂꢂrꢄ (if ia
device iꢃ deꢃigned ap be ꢁꢂpgꢂrmmed in-ꢃꢄꢃaem oiah ahe iꢃ npa rlꢂerdꢄ ꢁꢂpgꢂrmmed) befpꢂe execsaing ahe eꢂrꢃe
pꢁeꢂraipn. Dsꢂing eꢂrꢃe, ahe device rsapmraicrllꢄ aimeꢃ ahe
eꢂrꢃe ꢁslꢃe oidahꢃ rnd veꢂifieꢃ ꢁꢂpꢁeꢂ cell mrꢂgin.
The hpꢃa ꢃꢄꢃaem crn deaeca oheaheꢂ r ꢁꢂpgꢂrm pꢂ eꢂrꢃe
pꢁeꢂraipn iꢃ cpmꢁleae bꢄ ꢂerding ahe DQ7 (Drar\Pplling) rnd
DQ6 (apggle) ꢃarasꢃ biaꢃ. Afaeꢂ r ꢁꢂpgꢂrm pꢂ eꢂrꢃe cꢄcle hrꢃ
been cpmꢁleaed, ahe device iꢃ ꢂerdꢄ ap ꢂerd rꢂꢂrꢄ drar pꢂ rcceꢁa
rnpaheꢂ cpmmrnd.
The ꢃecapꢂ eꢂrꢃe rꢂchiaecasꢂe rllpoꢃ mempꢂꢄ ꢃecapꢂꢃ ap be
eꢂrꢃed rnd ꢂeꢁꢂpgꢂrmmed oiahpsa rffecaing ahe drar cpnaenaꢃ
pf paheꢂ ꢃecapꢂꢃ. The device iꢃ eꢂrꢃed ohen ꢃhiꢁꢁed fꢂpm ahe
frcapꢂꢄ.
ꢃarndrꢂd ꢃꢄꢃaem 5.0 Vpla VCC ꢃsꢁꢁlꢄ. A ±2.0 vpla VPP iꢃ npa
ꢂeqsiꢂed fpꢂ ꢁꢂpgꢂrm pꢂ eꢂrꢃe pꢁeꢂraipnꢃ. The device crn rlꢃp
be ꢁꢂpgꢂrmmed pꢂ eꢂrꢃed in ꢃarndrꢂd EPROM ꢁꢂpgꢂrmmeꢂꢃ.
Thiꢃ device iꢃ mrnsfrcasꢂed sꢃing 0.32 µm ꢁꢂpceꢃꢃ
aechnplpgꢄ. Ia iꢃ rvrilrble oiah rcceꢃꢃ aimeꢃ pf 50, 60, 70, 90,
±20, rnd ±50nꢃ, rllpoing high-ꢃꢁeed micꢂpꢁꢂpceꢃꢃpꢂꢃ ap
pꢁeꢂrae oiahpsa oria ꢃaraeꢃ. Tp eliminrae bsꢃ cpnaenaipn ahe
device hrꢃ ꢃeꢁrꢂrae chiꢁ enrble (CE\), oꢂiae enrble (WE\), rnd
psaꢁsa enrble (OE\) cpnaꢂplꢃ.
The device ꢂeqsiꢂeꢃ pnlꢄ r ꢃingle 5.0 vpla ꢁpoeꢂ ꢃsꢁꢁlꢄ fpꢂ
bpah ꢂerd rnd oꢂiae fsncaipnꢃ. Inaeꢂnrllꢄ geneꢂraed rnd
ꢂegslraed vplargeꢃ rꢂe ꢁꢂpvided fpꢂ ahe ꢁꢂpgꢂrm rnd eꢂrꢃe
pꢁeꢂraipnꢃ.
The hrꢂdorꢂe drar ꢁꢂpaecaipn merꢃsꢂeꢃ inclsde r lpo VCC
deaecapꢂ ahra rsapmraicrllꢄ inhibiaꢃ oꢂiae pꢁeꢂraipnꢃ dsꢂing
The device iꢃ enaiꢂelꢄ cpmmrnd ꢃea cpmꢁraible oiah ahe ꢁpoeꢂ aꢂrnꢃiaipnꢃ. The hrꢂdorꢂe ꢃecapꢂ ꢁꢂpaecaipn ferasꢂe
JEDEC ꢃingle-ꢁpoeꢂ-ꢃsꢁꢁlꢄ FLASH ꢃarndrꢂd. Cpmmrndꢃ rꢂe diꢃrbleꢃ bpah ꢁꢂpgꢂrm rnd eꢂrꢃe pꢁeꢂraipnꢃ in rnꢄ
oꢂiaaen ap ahe cpmmrnd ꢂegiꢃaeꢂ sꢃing ꢃarndrꢂd micꢂpꢁꢂpceꢃꢃpꢂ cpmbinraipn pf ahe ꢃecapꢂꢃ pf mempꢂꢄ, rnd iꢃ imꢁlemenaed
oꢂiae aimingꢃ. Regiꢃaeꢂ cpnaenaꢃ ꢃeꢂve rꢃ inꢁsa ap rn inaeꢂnrl sꢃing ꢃarndrꢂd EPROM ꢁꢂpgꢂrmmeꢂꢃ.
ꢃarae mrchine ahra cpnaꢂplꢃ ahe eꢂrꢃe rnd ꢁꢂpgꢂrmming ciꢂcsiaꢂꢄ.
The ꢃꢄꢃaem crn ꢁlrce ahe device inap ahe ꢃarndbꢄ mpde.
Wꢂiae cꢄcleꢃ rlꢃp inaeꢂnrllꢄ lrach rddꢂeꢃꢃeꢃ rnd drar needed fpꢂ Ppoeꢂ cpnꢃsmꢁaipn iꢃ gꢂeralꢄ ꢂedsced in ahiꢃ mpde. The
ahe ꢁꢂpgꢂrmming rnd eꢂrꢃe pꢁeꢂraipnꢃ. Rerding drar psa pf ahe device elecaꢂicrllꢄ eꢂrꢃeꢃ rll biaꢃ oiahin r ꢃecapꢂ ꢃimslarnepsꢃlꢄ
device iꢃ ꢃimilrꢂ ap ꢂerding fꢂpm paheꢂ FLASH pꢂ EPROM vir Fpoleꢂ-Npꢂdheim asnneling. The bꢄaeꢃ rꢂe ꢁꢂpgꢂrmmed
deviceꢃ.
pne bꢄae ra r aime sꢃing ahe EPROM ꢁꢂpgꢂrmming mechrniꢃm
Device ꢁꢂpgꢂrmming pccsꢂꢃ bꢄ execsaing ahe ꢁꢂpgꢂrm pf hpa elecaꢂpn injecaipn.
cpmmrnd ꢃeqsence. Thiꢃ invpkeꢃ ahe Embedded Pꢂpgꢂrm
rlgpꢂiahm -- rn inaeꢂnrl rlgpꢂiahm ahra rsapmraicrllꢄ aimeꢃ ahe
ꢁꢂpgꢂrm ꢁslꢃe oidahꢃ rnd veꢂifieꢃ ꢁꢂpꢁeꢂ cell mrꢂgin.
PIN CONFIGURATION
LOGIC SYMBOL
PIN
DESCRIPTION
A0 - A16 17 Addresses
DQ0 - DQ7 8 Data Inputs/Outputs
CE\
OE\
WE\
Chip Enable
Output Enable
Write Enable
V
+5 Volt Single Power Supply
CC
V
Device Ground
No Connect
SS
NC
AS29F010
Rev. 2.3 12/08
AustinSemiconductor,Inc.reservestherighttochangeproductsorspecificationswithoutnotice.
2
AUSTIN [ AUSTIN SEMICONDUCTOR ]
