Table 91. Status Codes for Master Receiver Mode
Status Code
(TWSR)
Prescaler Bits
are 0
Application Software Response
Status of the Two-wire Serial
Bus and Two-wire Serial Inter-
face Hardware
To TWCR
STA
To/from TWDR
STO
0
TWINT
1
TWEA
X
Next Action Taken by TWI Hardware
0x08
A START condition has been Load SLA+R
transmitted
X
SLA+R will be transmitted
ACK or NOT ACK will be received
0x10
A
repeated START condition Load SLA+R or
X
X
0
0
1
1
X
X
SLA+R will be transmitted
ACK or NOT ACK will be received
SLA+W will be transmitted
has been transmitted
Load SLA+W
Logic will switch to master transmitter mode
0x38
0x40
0x48
Arbitration lost in SLA+R or NOT No TWDR action or
ACK bit
0
1
0
0
1
1
X
X
Two-wire Serial Bus will be released and not addressed
slave mode will be entered
A START condition will be transmitted when the bus
becomes free
No TWDR action
SLA+R has been transmitted;
ACK has been received
No TWDR action or
No TWDR action
0
0
0
0
1
1
0
1
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be returned
SLA+R has been transmitted;
NOT ACK has been received
No TWDR action or
No TWDR action or
1
0
0
1
1
1
X
X
Repeated START will be transmitted
STOP condition will be transmitted and TWSTO flag will
be reset
No TWDR action
1
1
1
X
STOP condition followed by a START condition will be
transmitted and TWSTO flag will be reset
0x50
0x58
Data byte has been received;
ACK has been returned
Read data byte or
Read data byte
0
0
0
1
0
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be returned
0
1
1
Data byte has been received;
NOT ACK has been returned
Read data byte or
Read data byte or
1
0
0
1
1
1
X
X
Repeated START will be transmitted
STOP condition will be transmitted and TWSTO flag will
be reset
Read data byte
1
1
1
X
STOP condition followed by a START condition will be
transmitted and TWSTO flag will be reset
Slave Receiver Mode
In the Slave Receiver mode, a number of data bytes are received from a master trans-
mitter (see Figure 104). All the status codes mentioned in this section assume that the
prescaler bits are zero or are masked to zero.
Figure 104. Data Transfer in Slave Receiver Mode
Device 1
Device 2
MASTER
TRANSMITTER
Device 3
SLAVE
Device n
........
RECEIVER
VCC
R1
R2
SDA
SCL
To initiate the Slave Receiver mode, TWAR and TWCR must be initialized as follows:
TWAR
TWA6
TWA5
TWA4
TWA3
TWA2
TWA1
TWA0
TWGCE
value
Device’s Own Slave Address
220
AT90CAN128
4250E–CAN–12/04
ATMEL [ ATMEL ]
