ATmega8A
2. Overview
The ATmega8A is a low-power CMOS 8-bit microcontroller based on the AVR RISC architec-
ture. By executing powerful instructions in a single clock cycle, the ATmega8A achieves
throughputs approaching 1 MIPS per MHz, allowing the system designer to optimize power con-
sumption versus processing speed.
2.1
Block Diagram
Figure 2-1. Block Diagram
XTAL1
RESET
PC0 - PC6
PB0 - PB7
VCC
XTAL2
PORTC DRIVERS/BUFFERS
PORTC DIGITAL INTERFACE
PORTB DRIVERS/BUFFERS
PORTB DIGITAL INTERFACE
GND
ADC
INTERFACE
MUX &
ADC
TWI
AGND
AREF
TIMERS/
COUNTERS
OSCILLATOR
PROGRAM
COUNTER
STACK
POINTER
PROGRAM
FLASH
INTERNAL
OSCILLATOR
SRAM
INSTRUCTION
REGISTER
WATCHDOG
TIMER
GENERAL
PURPOSE
REGISTERS
OSCILLATOR
X
Y
Z
INSTRUCTION
DECODER
MCU CTRL.
& TIMING
CONTROL
LINES
INTERRUPT
UNIT
ALU
STATUS
REGISTER
AVR CPU
EEPROM
USART
PROGRAMMING
LOGIC
SPI
+
-
COMP.
INTERFACE
PORTD DIGITAL INTERFACE
PORTD DRIVERS/BUFFERS
PD0 - PD7
3
8159C–AVR–07/09
ATMEL [ ATMEL ]
