ATmega64A
19.1
19.2
19.3
19.4
19.5
Features ........................................................................................................164
Overview ........................................................................................................164
SS Pin Functionality ......................................................................................169
Data Modes ...................................................................................................169
Register Description ......................................................................................171
20 USART ................................................................................................... 174
20.1
20.2
20.3
20.4
20.5
20.6
20.7
20.8
20.9
Features ........................................................................................................174
Overview ........................................................................................................174
Clock Generation ...........................................................................................176
Frame Formats ..............................................................................................178
USART Initialization .......................................................................................179
Data Transmission – The USART Transmitter ..............................................181
Data Reception – The USART Receiver .......................................................183
Asynchronous Data Reception ......................................................................187
Multi-processor Communication Mode ..........................................................190
20.10 Examples of Baud Rate Setting .....................................................................192
20.11 Register Description ......................................................................................196
21 TWI – Two-wire Serial Interface .......................................................... 201
21.1
21.2
21.3
21.4
21.5
21.6
21.7
21.8
21.9
Features ........................................................................................................201
Overview ........................................................................................................201
Two-wire Serial Interface Bus Definition ........................................................203
Data Transfer and Frame Format ..................................................................204
Multi-master Bus Systems, Arbitration and Synchronization .........................207
Using the TWI ................................................................................................209
Transmission Modes .....................................................................................212
Multi-master Systems and Arbitration ............................................................225
TWI Register Description ...............................................................................226
22 Analog Comparator .............................................................................. 230
22.1
22.2
Analog Comparator Multiplexed Input ...........................................................230
Register Description ......................................................................................231
23 Analog to Digital Converter ................................................................. 233
23.1
23.2
23.3
23.4
Features ........................................................................................................233
Overview ........................................................................................................233
Operation .......................................................................................................234
Starting a Conversion ....................................................................................235
iv
8160C–AVR–07/09
ATMEL [ ATMEL ]
