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ATMEGA48PA-AU 参数 Datasheet PDF下载

ATMEGA48PA-AU图片预览
型号: ATMEGA48PA-AU
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器与4/8/ 16 / 32K字节的系统内可编程闪存 [8-bit Microcontroller with 4/8/16/32K Bytes In-System Programmable Flash]
分类和应用: 闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 448 页 / 12817 K
品牌: ATMEL [ ATMEL ]
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ATmega48PA/88PA/168PA/328P  
Figure 21-8. Arbitration Between Two Masters  
START  
Master A Loses  
Arbitration, SDAA SDA  
SDA from  
Master A  
SDA from  
Master B  
SDA Line  
Synchronized  
SCL Line  
Note that arbitration is not allowed between:  
• A REPEATED START condition and a data bit.  
• A STOP condition and a data bit.  
• A REPEATED START and a STOP condition.  
It is the user software’s responsibility to ensure that these illegal arbitration conditions never  
occur. This implies that in multi-master systems, all data transfers must use the same composi-  
tion of SLA+R/W and data packets. In other words: All transmissions must contain the same  
number of data packets, otherwise the result of the arbitration is undefined.  
220  
8161D–AVR–10/09  
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