ATmega16/32/64/M1/C1
4.3.2
The EEPROM Address Registers – EEARH and EEARL
Bit
15
14
13
12
11
10
EEAR10
EEAR2
2
9
EEAR9
EEAR1
1
8
EEAR8
EEAR0
0
–
–
–
–
–
EEARH
EEAR7
EEAR6
EEAR5
EEAR4
EEAR3
EEARL
7
R
6
R
5
R
4
R
3
R
Read/Write
Initial Value
R/W
R/W
X
R/W
R/W
X
R/W
R/W
X
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
X
X
X
X
X
X
X
X
• Bits 15.11 – Reserved Bits
These bits are reserved bits in the ATmega16/32/64/M1/C1 and will always read as zero.
• Bits 9..0 – EEAR10..0: EEPROM Address
The EEPROM Address Registers – EEARH and EEARL specify the EEPROM address in the
512/1024/2048 bytes EEPROM space. The EEPROM data bytes are addressed linearly
between 0 and 511/1023/2047. The initial value of EEAR is undefined. A proper value must be
written before the EEPROM may be accessed.
4.3.3
The EEPROM Data Register – EEDR
Bit
7
6
EEDR6
R/W
0
5
EEDR5
R/W
0
4
EEDR4
R/W
0
3
EEDR3
R/W
0
2
EEDR2
R/W
0
1
EEDR1
R/W
0
0
EEDR0
R/W
0
EEDR7
R/W
0
EEDR
Read/Write
Initial Value
• Bits 7..0 – EEDR7.0: EEPROM Data
For the EEPROM write operation, the EEDR Register contains the data to be written to the
EEPROM in the address given by the EEAR Register. For the EEPROM read operation, the
EEDR contains the data read out from the EEPROM at the address given by EEAR.
4.3.4
The EEPROM Control Register – EECR
Bit
7
6
5
EEPM1
R/W
X
4
EEPM0
R/W
X
3
EERIE
R/W
0
2
EEMWE
R/W
0
1
EEWE
R/W
X
0
EERE
R/W
0
–
–
EECR
Read/Write
Initial Value
R
0
R
0
• Bits 7..6 – Reserved Bits
These bits are reserved bits in the ATmega16/32/64/M1/C1 and will always read as zero.
• Bits 5..4 – EEPM1 and EEPM0: EEPROM Programming Mode Bits
The EEPROM Programming mode bit setting defines which programming action that will be trig-
gered when writing EEWE. It is possible to program data in one atomic operation (erase the old
value and program the new value) or to split the Erase and Write operations in two different
operations. The Programming times for the different modes are shown in Table 4-1 on page 24.
23
7647F–AVR–04/09
ATMEL [ ATMEL ]
