ATmega16/32/64/M1/C1
a. Slave task of master node:
Before enabling the HEADER, the master must set the appropriate LIN13 bit value in
LINCR register.
b. For slaves nodes, the workaround is in 2 parts:
– Before enabling the RESPONSE, use the following function:
void lin_wa_head(void) {
unsigned char temp;
temp = LINBTR;
LINCR = 0x00;
// It is not a RESET !
LINBTR = (1<<LDISR)|temp;
LINCR = (1<<LIN13)|(1<<LENA)|(0<<LCMD2)|(0<<LCMD1)|(0<<LCMD0);
LINDLR = 0x88;
// If it isn't already done
}
– Once the RESPONSE is received or sent (having RxOK or TxOK as well as
LERR), use the following function:
void lin_wa_tail(void)
LINCR = 0x00;
{
// It is not a RESET !
LINBTR = 0x00;
LINCR = (0<<LIN13)|(1<<LENA)|(0<<LCMD2)|(0<<LCMD1)|(0<<LCMD0);
}
The time-out counter is disabled during the RESPONSE when the workaround is set.
5. Wrong TSOFFSET manufacturing calibration value.
Erroneous value of TSOFFSET programmed in signature byte.
(TSOFFSET was introduced from REVB silicon).
Problem fix / workaround
To identify RevB with wrong TSOFFSET value, check device signature byte at address
0X3F if value is not 0X42 (Ascii code ‘B’) then use the following formula.
TS_OFFSET(True) = (150*(1-TS_GAIN))+TS_OFFSET.
6. PD0-PD3 set to outputs and PD4 pulled down following power-on with external reset
active.
At power-on with the external reset signal active the four I/O lines PD0-PD3 may be forced
into an output state. Normally these lines should be in an input state. PD4 may be pulled
down with internal 220 kOhm resistor. Following release of the reset line (whatever is the
startup time) with the clock running the I/Os PD0-PD4 will adopt their intended input state.
Problem fix / workaround
None
21
7647DS–AVR–08/08
ATMEL [ ATMEL ]
