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ATMEGA16L-8PU 参数 Datasheet PDF下载

ATMEGA16L-8PU图片预览
型号: ATMEGA16L-8PU
PDF下载: 下载PDF文件 查看货源
内容描述: 8 -bit微控制器16K字节In- Syustem可编程Flash [8-bit Microcontroller with 16K Bytes In-Syustem Programmable Flash]
分类和应用: 微控制器PC
文件页数/大小: 357 页 / 5688 K
品牌: ATMEL [ ATMEL CORPORATION ]
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ATmega16(L)
Unconnected pins
If some pins are unused, it is recommended to ensure that these pins have a defined level. Even
though most of the digital inputs are disabled in the deep sleep modes as described above, float-
ing inputs should be avoided to reduce current consumption in all other modes where the digital
inputs are enabled (Reset, Active mode and Idle mode).
The simplest method to ensure a defined level of an unused pin, is to enable the internal pull-up.
In this case, the pull-up will be disabled during reset. If low power consumption during reset is
important, it is recommended to use an external pull-up or pull-down. Connecting unused pins
directly to V
CC
or GND is not recommended, since this may cause excessive currents if the pin is
accidentally configured as an output.
Alternate Port
Functions
Most port pins have alternate functions in addition to being General Digital I/Os.
shows how the port pin control signals from the simplified
can be overridden by alter-
nate functions. The overriding signals may not be present in all port pins, but the figure serves
as a generic description applicable to all port pins in the AVR microcontroller family.
Figure 26.
Alternate Port Functions
PUOExn
PUOVxn
1
0
PUD
DDOExn
DDOVxn
1
0
Q D
DDxn
Q
CLR
PVOExn
PVOVxn
WDx
RESET
RDx
1
Pxn
0
Q
D
PORTxn
DIEOExn
DIEOVxn
1
0
Q
CLR
WPx
RESET
RRx
SLEEP
SYNCHRONIZER
D
SET
RPx
Q
D
Q
PINxn
L
CLR
Q
CLR
Q
clk
I/O
DIxn
AIOxn
PUOExn:
PUOVxn:
DDOExn:
DDOVxn:
PVOExn:
PVOVxn:
DIEOExn:
DIEOVxn:
SLEEP:
Pxn PULL-UP OVERRIDE ENABLE
Pxn PULL-UP OVERRIDE VALUE
Pxn DATA DIRECTION OVERRIDE ENABLE
Pxn DATA DIRECTION OVERRIDE VALUE
Pxn PORT VALUE OVERRIDE ENABLE
Pxn PORT VALUE OVERRIDE VALUE
Pxn DIGITAL INPUT-ENABLE OVERRIDE ENABLE
Pxn DIGITAL INPUT-ENABLE OVERRIDE VALUE
SLEEP CONTROL
PUD:
WDx:
RDx:
RRx:
WPx:
RPx:
clk
I/O
:
DIxn:
AIOxn:
PULLUP DISABLE
WRITE DDRx
READ DDRx
READ PORTx REGISTER
WRITE PORTx
READ PORTx PIN
I/O CLOCK
DIGITAL INPUT PIN n ON PORTx
ANALOG INPUT/OUTPUT PIN n ON PORTx
Note:
1. WPx, WDx, RRx, RPx, and RDx are common to all pins within the same port. clk
I/O
, SLEEP,
and PUD are common to all ports. All other signals are unique for each pin.
DATA BUS
55
2466S–AVR–05/09