ATmega128
Figure 4.
AVR CPU General Purpose Working Registers
7
R0
R1
R2
…
R13
General
Purpose
Working
Registers
R14
R15
R16
R17
…
R26
R27
R28
R29
R30
R31
$1A
$1B
$1C
$1D
$1E
$1F
X-register Low Byte
X-register High Byte
Y-register Low Byte
Y-register High Byte
Z-register Low Byte
Z-register High Byte
$0D
$0E
$0F
$10
$11
0
Addr.
$00
$01
$02
Most of the instructions operating on the Register file have direct access to all registers, and
most of them are single cycle instructions.
As shown in
each register is also assigned a data memory address, mapping them
directly into the first 32 locations of the user Data Space. Although not being physically imple-
mented as SRAM locations, this memory organization provides great flexibility in access of the
registers, as the X-, Y-, and Z-pointer Registers can be set to index any register in the file.
X-register, Y-register,
and Z-register
The registers R26..R31 have some added functions to their general purpose usage. These reg-
isters are 16-bit address pointers for indirect addressing of the Data Space. The three indirect
address registers X, Y, and Z are described in
Figure 5.
The X-, Y-, and Z-registers
15
X - register
7
R27 ($1B)
XH
0
7
R26 ($1A)
XL
0
0
15
Y - register
7
R29 ($1D)
YH
0
7
R28 ($1C)
YL
0
0
15
Z - register
7
R31 ($1F)
ZH
0
7
R30 ($1E)
ZL
0
0
In the different addressing modes these address registers have functions as fixed displacement,
automatic increment, and automatic decrement (see the Instruction Set Reference for details).
13
2467R–AVR–06/08