ATmega48/88/168
Table 19-8. UCPOLn Bit Settings
Transmitted Data Changed (Output of
Received Data Sampled (Input on RxDn
Pin)
UCPOLn
TxDn Pin)
0
1
Rising XCKn Edge
Falling XCKn Edge
Falling XCKn Edge
Rising XCKn Edge
19.10.5 UBRRnL and UBRRnH – USART Baud Rate Registers
Bit
15
14
13
12
11
10
9
8
–
–
–
–
UBRRn[11:8]
UBRRnH
UBRRnL
UBRRn[7:0]
7
R
6
R
5
R
4
R
3
R/W
R/W
0
2
R/W
R/W
0
1
R/W
R/W
0
0
R/W
R/W
0
Read/Write
Initial Value
R/W
0
R/W
0
R/W
0
R/W
0
0
0
0
0
0
0
0
0
• Bit 15:12 – Reserved Bits
These bits are reserved for future use. For compatibility with future devices, these bit must be
written to zero when UBRRnH is written.
• Bit 11:0 – UBRR11:0: USART Baud Rate Register
This is a 12-bit register which contains the USART baud rate. The UBRRnH contains the four
most significant bits, and the UBRRnL contains the eight least significant bits of the USART
baud rate. Ongoing transmissions by the Transmitter and Receiver will be corrupted if the baud
rate is changed. Writing UBRRnL will trigger an immediate update of the baud rate prescaler.
19.11 Examples of Baud Rate Setting
For standard crystal and resonator frequencies, the most commonly used baud rates for asyn-
chronous operation can be generated by using the UBRRn settings in Table 19-9. UBRRn
values which yield an actual baud rate differing less than 0.5% from the target baud rate, are
bold in the table. Higher error ratings are acceptable, but the Receiver will have less noise resis-
tance when the error ratings are high, especially for large serial frames (see “Asynchronous
Operational Range” on page 188). The error values are calculated using the following equation:
BaudRateClosest Match
⎛
⎞
Error[%] = -------------------------------------------------- – 1 • 100%
⎝
⎠
BaudRate
195
2545M–AVR–09/07
ATMEL [ ATMEL ]
