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ATMEGA8A-AUR 参数 Datasheet PDF下载

ATMEGA8A-AUR图片预览
型号: ATMEGA8A-AUR
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microcontroller, 8-Bit, FLASH, AVR RISC CPU, 16MHz, CMOS, PQFP32, 7 X 7 MM, 1 MM HEIGHT, 0.80 MM PITCH, GREEN, PLASTIC, MS-026ABA, TQFP-32]
分类和应用: 闪存
文件页数/大小: 308 页 / 4674 K
品牌: ATMEL [ ATMEL ]
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Parallel  
Programming  
Enter Programming  
Mode  
The following algorithm puts the device in Parallel Programming mode:  
1. Apply 4.5 - 5.5V between VCC and GND, and wait at least 100 µs.  
2. Set RESET to “0” and toggle XTAL1 at least 6 times  
3. Set the Prog_enable pins listed in Table 92 on page 227 to “0000” and wait at least 100  
ns.  
4. Apply 11.5 - 12.5V to RESET. Any activity on Prog_enable pins within 100 ns after +12V  
has been applied to RESET, will cause the device to fail entering Programming mode.  
Note, if the RESET pin is disabled by programming the RSTDISBL Fuse, it may not be possible  
to follow the proposed algorithm above. The same may apply when External Crystal or External  
RC configuration is selected because it is not possible to apply qualified XTAL1 pulses. In such  
cases, the following algorithm should be followed:  
1. Set Prog_enable pins listed in Table 92 on page 227 to “0000”.  
2. Apply 4.5 - 5.5V between VCC and GND simultaneously as 11.5 - 12.5V is applied to  
RESET.  
3. Wait 100 ns.  
4. Re-program the fuses to ensure that External Clock is selected as clock source  
(CKSEL3:0 = 0’b0000) and RESET pin is activated (RSTDISBL unprogrammed). If Lock  
Bits are programmed, a chip erase command must be executed before changing the  
fuses.  
5. Exit Programming mode by power the device down or by bringing RESET pin to 0’b0.  
6. Entering Programming mode with the original algorithm, as described above.  
Considerations for  
The loaded command and address are retained in the device during programming. For efficient  
Efficient Programming programming, the following should be considered.  
The command needs only be loaded once when writing or reading multiple memory  
locations.  
Skip writing the data value 0xFF, that is the contents of the entire EEPROM (unless the  
EESAVE Fuse is programmed) and Flash after a Chip Erase.  
Address High byte needs only be loaded before programming or reading a new 256 word  
window in Flash or 256 byte EEPROM. This consideration also applies to Signature bytes  
reading.  
Chip Erase  
The Chip Erase will erase the Flash and EEPROM(1) memories plus Lock Bits. The Lock Bits are  
not reset until the Program memory has been completely erased. The Fuse Bits are not  
changed. A Chip Erase must be performed before the Flash and/or the EEPROM are  
reprogrammed.  
Note:  
1. The EEPRPOM memory is preserved during chip erase if the EESAVE Fuse is programmed.  
Load Command “Chip Erase”  
1. Set XA1, XA0 to “10”. This enables command loading.  
2. Set BS1 to “0”.  
3. Set DATA to “1000 0000”. This is the command for Chip Erase.  
4. Give XTAL1 a positive pulse. This loads the command.  
5. Give WR a negative pulse. This starts the Chip Erase. RDY/BSY goes low.  
6. Wait until RDY/BSY goes high before loading a new command.  
228  
ATmega8(L)  
2486T–AVR–05/08  
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