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ATMEGA48V-10MMHR 参数 Datasheet PDF下载

ATMEGA48V-10MMHR图片预览
型号: ATMEGA48V-10MMHR
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microcontroller, 8-Bit, FLASH, AVR RISC CPU, 10MHz, CMOS, PQCC28, 4 X 4 MM, 1 MM HEIGHT, 0.45 MM PITCH, GREEN, PLASTIC, VQFN-28]
分类和应用: 闪存微控制器
文件页数/大小: 376 页 / 4764 K
品牌: ATMEL [ ATMEL ]
 浏览型号ATMEGA48V-10MMHR的Datasheet PDF文件第109页浏览型号ATMEGA48V-10MMHR的Datasheet PDF文件第110页浏览型号ATMEGA48V-10MMHR的Datasheet PDF文件第111页浏览型号ATMEGA48V-10MMHR的Datasheet PDF文件第112页浏览型号ATMEGA48V-10MMHR的Datasheet PDF文件第114页浏览型号ATMEGA48V-10MMHR的Datasheet PDF文件第115页浏览型号ATMEGA48V-10MMHR的Datasheet PDF文件第116页浏览型号ATMEGA48V-10MMHR的Datasheet PDF文件第117页  
ATmega48/88/168  
Assembly Code Example(1)  
TIM16_ReadTCNT1:  
; Save global interrupt flag  
in r18,SREG  
; Disable interrupts  
cli  
; Read TCNT1 into r17:r16  
in r16,TCNT1L  
in r17,TCNT1H  
; Restore global interrupt flag  
outSREG,r18  
ret  
C Code Example(1)  
unsigned int TIM16_ReadTCNT1( void )  
{
unsigned char sreg;  
unsigned int i;  
/* Save global interrupt flag */  
sreg = SREG;  
/* Disable interrupts */  
_CLI();  
/* Read TCNT1 into i */  
i = TCNT1;  
/* Restore global interrupt flag */  
SREG = sreg;  
return i;  
}
Note:  
1. See ”About Code Examples” on page 9.  
For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI”  
instructions must be replaced with instructions that allow access to extended I/O. Typically  
“LDS” and “STS” combined with “SBRS”, “SBRC”, “SBR”, and “CBR”.  
The assembly code example returns the TCNT1 value in the r17:r16 register pair.  
The following code examples show how to do an atomic write of the TCNT1 Register contents.  
Writing any of the OCR1A/B or ICR1 Registers can be done by using the same principle.  
113  
2545M–AVR–09/07  
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