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ATMEGA8L-8MUR 参数 Datasheet PDF下载

ATMEGA8L-8MUR图片预览
型号: ATMEGA8L-8MUR
PDF下载: 下载PDF文件 查看货源
内容描述: 8位爱特梅尔带有8K字节的系统内可编程闪存 [8-bit Atmel with 8KBytes In-System PRogrammable Flash]
分类和应用: 闪存微控制器和处理器外围集成电路异步传输模式PCATM时钟
文件页数/大小: 331 页 / 6705 K
品牌: ATMEL [ ATMEL ]
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ATmega8(L)  
Table 21 summarizes the function of the overriding signals. The pin and port indexes from Fig-  
ure 25 on page 56 are not shown in the succeeding tables. The overriding signals are generated  
internally in the modules having the alternate function.  
Table 21. Generic Description of Overriding Signals for Alternate Functions  
Signal Name Full Name  
Description  
PUOE  
PUOV  
DDOE  
DDOV  
PVOE  
Pull-up Override  
Enable  
If this signal is set, the pull-up enable is controlled by  
the PUOV signal. If this signal is cleared, the pull-up is  
enabled when {DDxn, PORTxn, PUD} = 0b010.  
Pull-up Override  
Value  
If PUOE is set, the pull-up is enabled/disabled when  
PUOV is set/cleared, regardless of the setting of the  
DDxn, PORTxn, and PUD Register bits.  
Data Direction  
Override Enable  
If this signal is set, the Output Driver Enable is  
controlled by the DDOV signal. If this signal is cleared,  
the Output driver is enabled by the DDxn Register bit.  
Data Direction  
Override Value  
If DDOE is set, the Output Driver is enabled/disabled  
when DDOV is set/cleared, regardless of the setting of  
the DDxn Register bit.  
Port Value  
Override Enable  
If this signal is set and the Output Driver is enabled,  
the port value is controlled by the PVOV signal. If  
PVOE is cleared, and the Output Driver is enabled, the  
port Value is controlled by the PORTxn Register bit.  
PVOV  
Port Value  
If PVOE is set, the port value is set to PVOV,  
Override Value  
regardless of the setting of the PORTxn Register bit.  
DIEOE  
Digital Input Enable  
Override Enable  
If this bit is set, the Digital Input Enable is controlled by  
the DIEOV signal. If this signal is cleared, the Digital  
Input Enable is determined by MCU-state (Normal  
mode, sleep modes).  
DIEOV  
DI  
Digital Input Enable  
Override Value  
If DIEOE is set, the Digital Input is enabled/disabled  
when DIEOV is set/cleared, regardless of the MCU  
state (Normal mode, sleep modes).  
Digital Input  
This is the Digital Input to alternate functions. In the  
figure, the signal is connected to the output of the  
schmitt trigger but before the synchronizer. Unless the  
Digital Input is used as a clock source, the module with  
the alternate function will use its own synchronizer.  
AIO  
Analog Input/output  
This is the Analog Input/output to/from alternate  
functions. The signal is connected directly to the pad,  
and can be used bi-directionally.  
The following subsections shortly describe the alternate functions for each port, and relate the  
overriding signals to the alternate function. Refer to the alternate function description for further  
details.  
57  
2486AA–AVR–02/2013  
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