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ATMEGA8L-8MUR 参数 Datasheet PDF下载

ATMEGA8L-8MUR图片预览
型号: ATMEGA8L-8MUR
PDF下载: 下载PDF文件 查看货源
内容描述: 8位爱特梅尔带有8K字节的系统内可编程闪存 [8-bit Atmel with 8KBytes In-System PRogrammable Flash]
分类和应用: 闪存微控制器和处理器外围集成电路异步传输模式PCATM时钟
文件页数/大小: 331 页 / 6705 K
品牌: ATMEL [ ATMEL ]
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ATmega8(L)  
Compare Match  
Output Unit  
The Compare Output mode (COM21:0) bits have two functions. The waveform generator uses  
the COM21:0 bits for defining the Output Compare (OC2) state at the next Compare Match.  
Also, the COM21:0 bits control the OC2 pin output source. Figure 48 shows a simplified sche-  
matic of the logic affected by the COM21:0 bit setting. The I/O Registers, I/O bits, and I/O pins in  
the figure are shown in bold. Only the parts of the general I/O Port Control Registers (DDR and  
PORT) that are affected by the COM21:0 bits are shown. When referring to the OC2 state, the  
reference is for the internal OC2 Register, not the OC2 pin.  
Figure 48. Compare Match Output Unit, Schematic  
COMn1  
Waveform  
Generator  
COMn0  
FOCn  
D
Q
Q
1
0
OCn  
Pin  
OCn  
D
PORT  
D
Q
DDR  
clkI/O  
The general I/O port function is overridden by the Output Compare (OC2) from the waveform  
generator if either of the COM21:0 bits are set. However, the OC2 pin direction (input or output)  
is still controlled by the Data Direction Register (DDR) for the port pin. The Data Direction Regis-  
ter bit for the OC2 pin (DDR_OC2) must be set as output before the OC2 value is visible on the  
pin. The port override function is independent of the Waveform Generation mode.  
The design of the Output Compare Pin logic allows initialization of the OC2 state before the out-  
put is enabled. Note that some COM21:0 bit settings are reserved for certain modes of  
operation. See “8-bit Timer/Counter Register Description” on page 114.  
107  
2486AA–AVR–02/2013  
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