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ATMEGA64A-AURSL514 参数 Datasheet PDF下载

ATMEGA64A-AURSL514图片预览
型号: ATMEGA64A-AURSL514
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microcontroller, 8-Bit, FLASH, 16MHz, CMOS, PQFP64, 14 X 14 MM, 1 MM HEIGHT, 0.80 MM PITCH, GREEN, PLASTIC, MS-026AEB, TQFP-64]
分类和应用: 微控制器
文件页数/大小: 13 页 / 298 K
品牌: ATMEL [ ATMEL ]
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The revision letter in this section refers to the revision of the ATmega64A device.  
9.1  
ATmega64A, rev. D  
First Analog Comparator conversion may be delayed  
Interrupts may be lost when writing the timer registers in the asynchronous timer  
Stabilizing time needed when changing XDIV Register  
Stabilizing time needed when changing OSCCAL Register  
IDCODE masks data from TDI input  
Reading EEPROM by using ST or STS to set EERE bit triggers unexpected interrupt request  
1. First Analog Comparator conversion may be delayed  
If the device is powered by a slow rising VCC, the first Analog Comparator conversion will take longer than  
expected on some devices.  
Problem Fix/Workaround  
When the device has been powered or reset, disable then enable theAnalog Comparator before the first  
conversion.  
2. Interrupts may be lost when writing the timer registers in the asynchronous timer  
The interrupt will be lost if a timer register that is synchronous timer clock is written when the asynchronous  
Timer/Counter register (TCNTx) is 0x00.  
Problem Fix / Workaround  
Always check that the asynchronous Timer/Counter register neither have the value 0xFF nor 0x00 before writ-  
ing to the asynchronous Timer Control Register (TCCRx), asynchronous Timer Counter Register (TCNTx), or  
asynchronous Output Compare Register (OCRx).  
3. Stabilizing time needed when changing XDIV Register  
After increasing the source clock frequency more than 2% with settings in the XDIV register, the device may  
execute some of the subsequent instructions incorrectly.  
Problem Fix / Workaround  
The NOP instruction will always be executed correctly also right after a frequency change. Thus, the next 8  
instructions after the change should be NOP instructions. To ensure this, follow this procedure:  
1.Clear the I bit in the SREG Register.  
2.Set the new pre-scaling factor in XDIV register.  
3.Execute 8 NOP instructions  
4.Set the I bit in SREG  
This will ensure that all subsequent instructions will execute correctly.  
Assembly Code Example:  
CLI  
; clear global interrupt enable  
; set new prescale value  
; no operation  
OUT XDIV, temp  
NOP  
NOP  
NOP  
NOP  
NOP  
NOP  
NOP  
NOP  
SEI  
; no operation  
; no operation  
; no operation  
; no operation  
; no operation  
; no operation  
; no operation  
; clear global interrupt enable  
ATmega64A [DATASHEET]  
11  
8160DS–AVR–02/2013