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ATMEGA48PA-CCU 参数 Datasheet PDF下载

ATMEGA48PA-CCU图片预览
型号: ATMEGA48PA-CCU
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microcontroller, 8-Bit, FLASH, AVR RISC CPU, 20MHz, CMOS, PBGA32, 4 X 4 MM, 0.60 MM HEIGHT, 0.50 MM PITCH, GREEN, PLASTIC, UFBGA-32]
分类和应用: 闪存微控制器
文件页数/大小: 349 页 / 2752 K
品牌: ATMEL [ ATMEL ]
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ATmega48/88/168  
part of the Z-pointer. The data in R1 and R0 are ignored. The PGERS bit will auto-clear  
upon completion of a Page Erase, or if no SPM instruction is executed within four clock  
cycles. The CPU is halted during the entire Page Write operation if the NRWW section is  
addressed.  
• Bit 0 – SELFPRGEN: Self Programming Enable  
This bit enables the SPM instruction for the next four clock cycles. If written to one  
together with either RWWSRE, BLBSET, PGWRT or PGERS, the following SPM  
instruction will have a special meaning, see description above. If only SELFPRGEN is  
written, the following SPM instruction will store the value in R1:R0 in the temporary page  
buffer addressed by the Z-pointer. The LSB of the Z-pointer is ignored. The SELF-  
PRGEN bit will auto-clear upon completion of an SPM instruction, or if no SPM  
instruction is executed within four clock cycles. During Page Erase and Page Write, the  
SELFPRGEN bit remains high until the operation is completed.  
Writing any other combination than “10001”, “01001”, “00101”, “00011” or “00001” in the  
lower five bits will have no effect.  
Addressing the Flash  
During Self-  
Programming  
The Z-pointer is used to address the SPM commands.  
Bit  
15  
Z15  
Z7  
7
14  
Z14  
Z6  
6
13  
Z13  
Z5  
5
12  
Z12  
Z4  
4
11  
Z11  
Z3  
3
10  
Z10  
Z2  
2
9
Z9  
Z1  
1
8
Z8  
Z0  
0
ZH (R31)  
ZL (R30)  
Since the Flash is organized in pages (see Table 122 on page 274), the Program  
Counter can be treated as having two different sections. One section, consisting of the  
least significant bits, is addressing the words within a page, while the most significant  
bits are addressing the pages. This is1 shown in Figure 118. Note that the Page Erase  
and Page Write operations are addressed independently. Therefore it is of major impor-  
tance that the Boot Loader software addresses the same page in both the Page Erase  
and Page Write operation. Once a programming operation is initiated, the address is  
latched and the Z-pointer can be used for other operations.  
The only SPM operation that does not use the Z-pointer is Setting the Boot Loader Lock  
bits. The content of the Z-pointer is ignored and will have no effect on the operation. The  
LPM instruction does also use the Z-pointer to store the address. Since this instruction  
addresses the Flash byte-by-byte, also the LSB (bit Z0) of the Z-pointer is used.  
261  
2545D–AVR–07/04  
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