欢迎访问ic37.com |
会员登录 免费注册
发布采购

ATMEGA32L-8AUR 参数 Datasheet PDF下载

ATMEGA32L-8AUR图片预览
型号: ATMEGA32L-8AUR
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microcontroller, 8-Bit, FLASH, AVR RISC CPU, 8MHz, CMOS, PQFP44, 10 X 10 MM, 1 MM HEIGHT, 0.80 MM PITCH, GREEN, PLASTIC, MS-026ACB, TQFP-44]
分类和应用: 闪存微控制器
文件页数/大小: 347 页 / 3171 K
品牌: ATMEL [ ATMEL ]
 浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第50页浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第51页浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第52页浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第53页浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第55页浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第56页浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第57页浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第58页  
Unconnected pins  
If some pins are unused, it is recommended to ensure that these pins have a defined  
level. Even though most of the digital inputs are disabled in the deep sleep modes as  
described above, floating inputs should be avoided to reduce current consumption in all  
other modes where the digital inputs are enabled (Reset, Active mode and Idle mode).  
The simplest method to ensure a defined level of an unused pin, is to enable the internal  
pullup. In this case, the pullup will be disabled during reset. If low power consumption  
during reset is important, it is recommended to use an external pullup or pulldown. Con-  
necting unused pins directly to VCC or GND is not recommended, since this may cause  
excessive currents if the pin is accidentally configured as an output.  
Alternate Port Functions Most port pins have alternate functions in addition to being General Digital I/Os. Figure  
26 shows how the port pin control signals from the simplified Figure 23 can be overrid-  
den by alternate functions. The overriding signals may not be present in all port pins, but  
the figure serves as a generic description applicable to all port pins in the AVR micro-  
controller family.  
Figure 26. Alternate Port Functions(1)  
PUOExn  
PUOVxn  
1
PUD  
0
DDOExn  
DDOVxn  
1
Q
D
0
DDxn  
Q CLR  
WDx  
RDx  
PVOExn  
PVOVxn  
RESET  
1
0
Pxn  
Q
D
PORTxn  
Q CLR  
DIEOExn  
DIEOVxn  
SLEEP  
WPx  
RRx  
RESET  
1
0
SYNCHRONIZER  
RPx  
SET  
D
Q
D
L
Q
Q
PINxn  
CLR Q  
CLR  
clk I/O  
DIxn  
AIOxn  
PUOExn: Pxn PULL-UP OVERRIDE ENABLE  
PUOVxn: Pxn PULL-UP OVERRIDE VALUE  
DDOExn: Pxn DATA DIRECTION OVERRIDE ENABLE  
DDOVxn: Pxn DATA DIRECTION OVERRIDE VALUE  
PVOExn: Pxn PORT VALUE OVERRIDE ENABLE  
PVOVxn: Pxn PORT VALUE OVERRIDE VALUE  
PUD:  
WDx:  
RDx:  
RRx:  
WPx:  
RPx:  
PULLUP DISABLE  
WRITE DDRx  
READ DDRx  
READ PORTx REGISTER  
WRITE PORTx  
READ PORTx PIN  
DIEOExn: Pxn DIGITAL INPUT-ENABLE OVERRIDE ENABLE  
DIEOVxn: Pxn DIGITAL INPUT-ENABLE OVERRIDE VALUE  
clkI/O  
DIxn:  
AIOxn:  
:
I/O CLOCK  
DIGITAL INPUT PIN n ON PORTx  
ANALOG INPUT/OUTPUT PIN n ON PORTx  
SLEEP:  
SLEEP CONTROL  
Note:  
1. WPx, WDx, RRx, RPx, and RDx are common to all pins within the same port. clkI/O,  
SLEEP, and PUD are common to all ports. All other signals are unique for each pin.  
54  
ATmega32(L)  
2503J–AVR–10/06  
 复制成功!