JTAG Interface and On-chip Debug System ................................. 219
Features............................................................................................................ 219
Overview........................................................................................................... 219
Test Access Port – TAP.................................................................................... 219
TAP Controller .................................................................................................. 221
Using the Boundary-scan Chain....................................................................... 222
Using the On-chip Debug System .................................................................... 222
On-chip Debug Specific JTAG Instructions ...................................................... 223
On-chip Debug Related Register in I/O Memory .............................................. 224
Using the JTAG Programming Capabilities ...................................................... 224
Bibliography...................................................................................................... 224
IEEE 1149.1 (JTAG) Boundary-scan .............................................. 225
Features............................................................................................................ 225
System Overview.............................................................................................. 225
Data Registers.................................................................................................. 225
Boundary-scan Specific JTAG Instructions ...................................................... 227
Boundary-scan Chain ....................................................................................... 229
ATmega32 Boundary-scan Order..................................................................... 239
Boundary-scan Description Language Files..................................................... 243
Boot Loader Support – Read-While-Write Self-Programming..... 244
Features............................................................................................................ 244
Application and Boot Loader Flash Sections.................................................... 244
Read-While-Write and no Read-While-Write Flash Sections ........................... 244
Boot Loader Lock Bits....................................................................................... 246
Entering the Boot Loader Program................................................................... 247
Addressing the Flash during Self-Programming............................................... 249
Self-Programming the Flash............................................................................. 250
Memory Programming..................................................................... 256
Program And Data Memory Lock Bits .............................................................. 256
Fuse Bits........................................................................................................... 257
Signature Bytes ................................................................................................ 258
Calibration Byte ................................................................................................ 258
Page Size ......................................................................................................... 258
Parallel Programming Parameters, Pin Mapping, and Commands .................. 259
Parallel Programming ....................................................................................... 261
SPI Serial Downloading.................................................................................... 270
SPI Serial Programming Pin Mapping .............................................................. 270
Programming via the JTAG Interface ............................................................... 274
Electrical Characteristics................................................................ 287
Absolute Maximum Ratings*............................................................................. 287
DC Characteristics ........................................................................................... 287
External Clock Drive Waveforms...................................................................... 289
iv
ATmega32(L)
2503J–AVR–10/06