欢迎访问ic37.com |
会员登录 免费注册
发布采购

ATMEGA32L-8AUR 参数 Datasheet PDF下载

ATMEGA32L-8AUR图片预览
型号: ATMEGA32L-8AUR
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microcontroller, 8-Bit, FLASH, AVR RISC CPU, 8MHz, CMOS, PQFP44, 10 X 10 MM, 1 MM HEIGHT, 0.80 MM PITCH, GREEN, PLASTIC, MS-026ACB, TQFP-44]
分类和应用: 闪存微控制器
文件页数/大小: 347 页 / 3171 K
品牌: ATMEL [ ATMEL ]
 浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第28页浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第29页浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第30页浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第31页浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第33页浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第34页浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第35页浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第36页  
Power Management  
and Sleep Modes  
Sleep modes enable the application to shut down unused modules in the MCU, thereby  
saving power. The AVR provides various sleep modes allowing the user to tailor the  
power consumption to the application’s requirements.  
To enter any of the six sleep modes, the SE bit in MCUCR must be written to logic one  
and a SLEEP instruction must be executed. The SM2, SM1, and SM0 bits in the  
MCUCR Register select which sleep mode (Idle, ADC Noise Reduction, Power-down,  
Power-save, Standby, or Extended Standby) will be activated by the SLEEP instruction.  
See Table 13 for a summary. If an enabled interrupt occurs while the MCU is in a sleep  
mode, the MCU wakes up. The MCU is then halted for four cycles in addition to the  
start-up time, it executes the interrupt routine, and resumes execution from the instruc-  
tion following SLEEP. The contents of the Register File and SRAM are unaltered when  
the device wakes up from sleep. If a Reset occurs during sleep mode, the MCU wakes  
up and executes from the Reset Vector.  
Figure 11 on page 24 presents the different clock systems in the ATmega32, and their  
distribution. The figure is helpful in selecting an appropriate sleep mode.  
MCU Control Register –  
MCUCR  
The MCU Control Register contains control bits for power management.  
Bit  
7
SE  
R/W  
0
6
5
4
3
ISC11  
R/W  
0
2
ISC10  
R/W  
0
1
ISC01  
R/W  
0
0
ISC00  
R/W  
0
SM2  
R/W  
0
SM1  
R/W  
0
SM0  
R/W  
0
MCUCR  
Read/Write  
Initial Value  
• Bit 7 – SE: Sleep Enable  
The SE bit must be written to logic one to make the MCU enter the sleep mode when the  
SLEEP instruction is executed. To avoid the MCU entering the sleep mode unless it is  
the programmers purpose, it is recommended to write the Sleep Enable (SE) bit to one  
just before the execution of the SLEEP instruction and to clear it immediately after wak-  
ing up.  
• Bits 6...4 – SM2..0: Sleep Mode Select Bits 2, 1, and 0  
These bits select between the six available sleep modes as shown in Table 13.  
Table 13. Sleep Mode Select  
SM2  
SM1  
SM0  
Sleep Mode  
Idle  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
ADC Noise Reduction  
Power-down  
Power-save  
Reserved  
Reserved  
Standby(1)  
Extended Standby(1)  
Note:  
1. Standby mode and Extended Standby mode are only available with external crystals  
or resonators.  
32  
ATmega32(L)  
2503J–AVR–10/06  
 复制成功!