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ATMEGA32L-8AUR 参数 Datasheet PDF下载

ATMEGA32L-8AUR图片预览
型号: ATMEGA32L-8AUR
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microcontroller, 8-Bit, FLASH, AVR RISC CPU, 8MHz, CMOS, PQFP44, 10 X 10 MM, 1 MM HEIGHT, 0.80 MM PITCH, GREEN, PLASTIC, MS-026ACB, TQFP-44]
分类和应用: 闪存微控制器
文件页数/大小: 347 页 / 3171 K
品牌: ATMEL [ ATMEL ]
 浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第18页浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第19页浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第20页浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第21页浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第23页浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第24页浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第25页浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第26页  
The next code examples show assembly and C functions for reading the EEPROM. The  
examples assume that interrupts are controlled so that no interrupts will occur during  
execution of these functions.  
Assembly Code Example  
EEPROM_read:  
; Wait for completion of previous write  
sbic EECR,EEWE  
rjmp EEPROM_read  
; Set up address (r18:r17) in address register  
out EEARH, r18  
out EEARL, r17  
; Start eeprom read by writing EERE  
sbi EECR,EERE  
; Read data from data register  
in  
r16,EEDR  
ret  
C Code Example  
unsigned char EEPROM_read(unsigned int uiAddress)  
{
/* Wait for completion of previous write */  
while(EECR & (1<<EEWE))  
;
/* Set up address register */  
EEAR = uiAddress;  
/* Start eeprom read by writing EERE */  
EECR |= (1<<EERE);  
/* Return data from data register */  
return EEDR;  
}
EEPROM Write During Power- When entering Power-down Sleep mode while an EEPROM write operation is active,  
down Sleep Mode  
the EEPROM write operation will continue, and will complete before the Write Access  
time has passed. However, when the write operation is completed, the Oscillator contin-  
ues running, and as a consequence, the device does not enter Power-down entirely. It is  
therefore recommended to verify that the EEPROM write operation is completed before  
entering Power-down.  
Preventing EEPROM  
Corruption  
During periods of low VCC, the EEPROM data can be corrupted because the supply volt-  
age is too low for the CPU and the EEPROM to operate properly. These issues are the  
same as for board level systems using EEPROM, and the same design solutions should  
be applied.  
An EEPROM data corruption can be caused by two situations when the voltage is too  
low. First, a regular write sequence to the EEPROM requires a minimum voltage to  
operate correctly. Secondly, the CPU itself can execute instructions incorrectly, if the  
supply voltage is too low.  
22  
ATmega32(L)  
2503J–AVR–10/06  
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