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ATMEGA2560 参数 Datasheet PDF下载

ATMEGA2560图片预览
型号: ATMEGA2560
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器与256K字节的系统内可编程闪存 [8- BIT Microcontroller with 256K Bytes In-System Programmable Flash]
分类和应用: 闪存微控制器
文件页数/大小: 407 页 / 2985 K
品牌: ATMEL [ ATMEL ]
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Figure 105. Formats and States in the Master Receiver Mode  
MR  
Successfull  
S
SLA  
R
A
DATA  
A
DATA  
A
P
reception  
from a slave  
receiver  
$08  
$40  
$50  
$58  
Next transfer  
started with a  
repeated start  
condition  
RS  
SLA  
R
$10  
Not acknowledge  
received after the  
slave address  
W
A
P
$48  
MT  
Arbitration lost in slave  
address or data byte  
Other master  
continues  
Other master  
continues  
A or A  
A
$38  
A
$38  
Arbitration lost and  
addressed as slave  
Other master  
continues  
To corresponding  
states in slave mode  
$68 $78 $B0  
Any number of data bytes  
and their associated acknowledge bits  
From master to slave  
From slave to master  
DATA  
A
This number (contained in TWSR) corresponds  
to a defined state of the Two-Wire Serial Bus. The  
prescaler bits are zero or masked to zero  
n
Slave Receiver Mode  
In the Slave Receiver mode, a number of data bytes are received from a Master Trans-  
mitter (see Figure 106). All the status codes mentioned in this section assume that the  
prescaler bits are zero or are masked to zero.  
Figure 106. Data transfer in Slave Receiver mode  
VCC  
Device 1  
SLAVE  
RECEIVER  
Device 2  
MASTER  
TRANSMITTER  
Device 3  
Device n  
R1  
R2  
........  
SDA  
SCL  
To initiate the Slave Receiver mode, TWAR and TWCR must be initialized as follows:  
TWAR  
TWA6  
TWA5  
TWA4  
TWA3  
TWA2  
TWA1  
TWA0  
TWGCE  
value  
Device’s Own Slave Address  
262  
ATmega640/1280/1281/2560/2561  
2549A–AVR–03/05  
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