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ATMEGA16L-8MI 参数 Datasheet PDF下载

ATMEGA16L-8MI图片预览
型号: ATMEGA16L-8MI
PDF下载: 下载PDF文件 查看货源
内容描述: 8位AVR微控制器具有16K字节的系统内可编程闪存 [8-bit AVR Microcontroller with 16K Bytes In-System Programmable Flash]
分类和应用: 闪存微控制器和处理器外围集成电路异步传输模式ATM时钟
文件页数/大小: 315 页 / 2880 K
品牌: ATMEL [ ATMEL ]
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ATmega16(L)  
Table 19. Reset and Interrupt Vectors Placement(1)  
BOOTRST  
IVSEL  
Reset address  
$0000  
Interrupt Vectors Start Address  
$0002  
1
1
0
0
0
1
0
1
$0000  
Boot Reset Address + $0002  
$0002  
Boot Reset Address  
Boot Reset Address  
Boot Reset Address + $0002  
Note:  
1. The Boot Reset Address is shown in Table 99 on page 252. For the BOOTRST Fuse  
“1” means unprogrammed while “0” means programmed.  
The most typical and general program setup for the Reset and Interrupt Vector  
Addresses in ATmega16 is:  
Address Labels  
$000  
$002  
$004  
$006  
$008  
$00A  
$00C  
$00E  
$010  
$012  
$014  
$016  
$018  
$01A  
$01C  
$01E  
$020  
$022  
$024  
$026  
$028  
;
Code  
Comments  
jmp RESET  
; Reset Handler  
jmp EXT_INT0  
jmp EXT_INT1  
jmp TIM2_COMP  
jmp TIM2_OVF  
jmp TIM1_CAPT  
jmp TIM1_COMPA  
jmp TIM1_COMPB  
jmp TIM1_OVF  
jmp TIM0_OVF  
jmp SPI_STC  
jmp USART_RXC  
jmp USART_UDRE  
jmp USART_TXC  
jmp ADC  
; IRQ0 Handler  
; IRQ1 Handler  
; Timer2 Compare Handler  
; Timer2 Overflow Handler  
; Timer1 Capture Handler  
; Timer1 CompareA Handler  
; Timer1 CompareB Handler  
; Timer1 Overflow Handler  
; Timer0 Overflow Handler  
; SPI Transfer Complete Handler  
; USART RX Complete Handler  
; UDR Empty Handler  
; USART TX Complete Handler  
; ADC Conversion Complete Handler  
; EEPROM Ready Handler  
; Analog Comparator Handler  
; Two-wire Serial Interface Handler  
; IRQ2 Handler  
jmp EE_RDY  
jmp ANA_COMP  
jmp TWSI  
jmp EXT_INT2  
jmp TIM0_COMP  
jmp SPM_RDY  
; Timer0 Compare Handler  
; Store Program Memory Ready Handler  
$02A  
$02B  
$02C  
$02D  
$02E  
$02F  
...  
RESET:  
ldi r16,high(RAMEND) ; Main program start  
out SPH,r16  
ldi r16,low(RAMEND)  
out SPL,r16  
sei  
; Set stack pointer to top of RAM  
; Enable interrupts  
<instr> xxx  
...  
...  
43  
2466E–AVR–10/02  
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