2. Overview
The ATmega16/32/64/M1/C1 is a low-power CMOS 8-bit microcontroller based on the AVR
enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the
ATmega16/32/64/M1/C1 achieves throughputs approaching 1 MIPS per MHz allowing the sys-
tem designer to optimize power consumption versus processing speed.
2.1
Block Diagram
Figure 2-1. Block Diagram
Data Bus 8-bit
Interrupt
Unit
Program
Counter
Status
and Control
Flash Program
Memory
SPI
Unit
32 x 8
General
Purpose
Registrers
Instruction
Register
Watchdog
Timer
4 Analog
Comparators
Instruction
Decoder
ALU
HW LIN/UART
Timer 0
Timer 1
ADC
Control Lines
Data
SRAM
EEPROM
DAC
MPSC
I/O Lines
CAN
Current Source
The AVR core combines a rich instruction set with 32 general purpose working registers. All the
32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent
registers to be accessed in one single instruction executed in one clock cycle. The resulting
architecture is more code efficient while achieving throughputs up to ten times faster than con-
ventional CISC microcontrollers.
8
Atmel ATmega16/32/64/M1/C1
7647ES–AVR–07/12