ATmega169P
Table of Contents
Features..................................................................................................... 1
1
2
Pin Configurations ................................................................................... 2
1.1 Disclaimer .................................................................................................................2
Overview ................................................................................................... 3
2.1 Block Diagram ..........................................................................................................3
2.2 Pin Descriptions .......................................................................................................5
3
4
5
Resources ................................................................................................. 8
About Code Examples ............................................................................. 9
AVR CPU Core ........................................................................................ 10
5.1 Introduction .............................................................................................................10
5.2 Architectural Overview ...........................................................................................10
5.3 ALU – Arithmetic Logic Unit ...................................................................................11
5.4 Status Register .......................................................................................................12
5.5 General Purpose Register File ...............................................................................13
5.6 Stack Pointer ..........................................................................................................14
5.7 Instruction Execution Timing ..................................................................................15
5.8 Reset and Interrupt Handling .................................................................................16
6
AVR Memories ........................................................................................ 18
6.1 In-System Reprogrammable Flash Program Memory ............................................18
6.2 SRAM Data Memory ..............................................................................................19
6.3 EEPROM Data Memory .........................................................................................21
6.4 EEPROM Register Description ...............................................................................26
6.5 I/O Memory .............................................................................................................28
6.6 General Purpose I/O Registers ..............................................................................28
7
System Clock and Clock Options ......................................................... 29
7.1 Clock Systems and their Distribution ......................................................................29
7.2 Clock Sources ........................................................................................................30
7.3 Default Clock Source ..............................................................................................31
7.4 Calibrated Internal RC Oscillator ............................................................................31
7.5 Crystal Oscillator ....................................................................................................32
7.6 Low-frequency Crystal Oscillator ............................................................................33
7.7 External Clock ........................................................................................................35
i
8018A–AVR–03/06