ATmega169P
2. Overview
The ATmega169P is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By execut-
ing powerful instructions in a single clock cycle, the ATmega169P achieves throughputs approaching 1 MIPS per MHz
allowing the system designer to optimize power consumption versus processing speed.
2.1
Block Diagram
Block Diagram
Figure 2-1.
PF0 - PF7
PA0 - PA7
PC0 - PC7
VCC
GND
PORTF DRIVERS
PORTA DRIVERS
PORTC DRIVERS
DATA REGISTER
PORTF
DATA DIR.
REG. PORTF
DATA REGISTER
PORTA
DATA DIR.
REG. PORTA
DATA REGISTER
PORTC
DATA DIR.
REG. PORTC
8-BIT DATA BUS
AVCC
ADC
AREF
INTERNAL
OSCILLATOR
CALIB. OSC
OSCILLATOR
JTAG TAP
PROGRAM
COUNTER
STACK
POINTER
WATCHDOG
TIMER
TIMING AND
CONTROL
LCD
CONTROLLER/
DRIVER
ON-CHIP DEBUG
PROGRAM
FLASH
SRAM
MCU CONTROL
REGISTER
BOUNDARY-
SCAN
INSTRUCTION
REGISTER
GENERAL
PURPOSE
REGISTERS
X
Y
Z
TIMER/
COUNTERS
PROGRAMMING
LOGIC
INSTRUCTION
DECODER
INTERRUPT
UNIT
RESET
CONTROL
LINES
ALU
EEPROM
AVR CPU
STATUS
REGISTER
USART
UNIVERSAL
SERIAL INTERFACE
SPI
ANALOG
COMPARATOR
DATA REGISTER
PORTE
DATA DIR.
REG. PORTE
DATA REGISTER
PORTB
DATA DIR.
REG. PORTB
DATA REGISTER
PORTD
DATA DIR.
REG. PORTD
DATA REG.
PORTG
XTAL1
XTAL2
DATA DIR.
REG. PORTG
+
-
PORTE DRIVERS
PORTB DRIVERS
PORTD DRIVERS
PORTG DRIVERS
PE0 - PE7
PB0 - PB7
PD0 - PD7
PG0 - PG4
3
8018IS–AVR–11/06