1. Pin Configurations
Figure 1-1.
Pinout ATmega169P
PF5 (ADC5/TMS)
PF6 (ADC6/TDO)
PF4 (ADC4/TCK)
PF7 (ADC7/TDI)
PA0 (COM0)
PA1 (COM1)
50
61
60
59
58
57
56
55
54
53
52
51
64
63
62
49
48 PA3 (COM3)
47 PA4 (SEG0)
46 PA5 (SEG1)
45 PA6 (SEG2)
44 PA7 (SEG3)
43 PG2 (SEG4)
42 PC7 (SEG5)
41 PC6 (SEG6)
40 PC5 (SEG7)
39 PC4 (SEG8)
38 PC3 (SEG9)
37 PC2 (SEG10)
36 PC1 (SEG11)
35 PC0 (SEG12)
34 PG1 (SEG13)
33 PG0 (SEG14)
LCDCAP
(RXD/PCINT0) PE0
(TXD/PCINT1) PE1
(XCK/AIN0/PCINT2) PE2
(AIN1/PCINT3) PE3
(USCK/SCL/PCINT4) PE4
(DI/SDA/PCINT5) PE5
(DO/PCINT6) PE6
(CLKO/PCINT7) PE7
(SS/PCINT8) PB0
(SCK/PCINT9) PB1
(MOSI/PCINT10) PB2
(MISO/PCINT11) PB3
(OC0A/PCINT12) PB4
(OC1A/PCINT13) PB5
(OC1B/PCINT14) PB6
1
2
INDEX CORNER
3
4
5
6
7
8
9
10
11
12
13
14
15
16
22
23
24
25
26
27
28
(OC2A/PCINT15) PB7 17
(T1/SEG24) PG3 18
(T0/SEG23) PG4 19
RESET/PG5 20
VCC 21
29
(SEG17) PD5 30
(SEG16) PD6 31
(TOSC2) XTAL2
(TOSC1) XTAL1
(INT0/SEG21) PD1
(SEG20) PD2
(SEG19) PD3
Note:
The large center pad underneath the QFN/MLF packages is made of metal and internally con-
nected to GND. It should be soldered or glued to the board to ensure good mechanical stability. If
the center pad is left unconnected, the package might loosen from the board.
1.1
Disclaimer
Typical values contained in this datasheet are based on simulations and characterization of
other AVR microcontrollers manufactured on the same process technology. Min and Max values
will be available after the device is characterized.
2
ATmega169P
8018IS–AVR–11/06
(ICP1/SEG22) PD0
(SEG18) PD4
(SEG15) PD7 32
GND
PA2 (COM2)
PF0 (ADC0)
PF1 (ADC1)
PF2 (ADC2)
PF3 (ADC3)
AVCC
AREF
GND
GND
VCC
ATMEL [ ATMEL CORPORATION ]
