ATmega128
In the data sheet, it was not explained how to take advantage of the calibration
bytes for 2, 4, and 8 MHz Oscillator selections. This is now added in the following
sections:
Improved description of “Oscillator Calibration Register – OSCCAL” on page 41 and
“Calibration Byte” on page 292.
Changes from Rev.
2467C-02/02 to Rev.
2467D-03/02
1. Added more information about “ATmega103 Compatibility Mode” on page 5.
2. Updated Table 2, “EEPROM Programming Time,” on page 23.
3. Updated typical Start-up Time in Table 7 on page 37, Table 9 and Table 10 on
page 39, Table 12 on page 40, Table 14 on page 41, and Table 16 on page 42.
4. Updated Table 22 on page 56 with typical WDT Time-out.
5. Corrected description of ADSC bit in “ADC Control and Status Register A –
ADCSRA” on page 246.
6. Improved description on how to do a polarity check of the ADC differential
results in “ADC Conversion Result” on page 243.
7. Corrected JTAG version numbers in “JTAG Version Numbers” on page 256.
8. Improved description of addressing during SPM (usage of RAMPZ) on
“Addressing the Flash During Self-Programming” on page 281, “Performing
Page Erase by SPM” on page 283, and “Performing a Page Write” on page
283.
9. Added not regarding OCDEN Fuse below Table 118 on page 291.
10. Updated Programming Figures:
Figure 135 on page 293 and Figure 144 on page 305 are updated to also reflect that
AVCC must be connected during Programming mode. Figure 139 on page 300
added to illustrate how to program the fuses.
11. Added
a
note regarding usage of the PROG_PAGELOAD and
PROG_PAGEREAD instructions on page 311.
12. Added Calibrated RC Oscillator characterization curves in section
“ATmega128 Typical Characteristics” on page 336.
13. Updated “Two-wire Serial Interface” section.
More details regarding use of the TWI Power-down operation and using the TWI as
master with low TWBRR values are added into the data sheet. Added the note at
the end of the “Bit Rate Generator Unit” on page 205. Added the description at the
end of “Address Match Unit” on page 206.
14. Added a note regarding usage of Timer/Counter0 combined with the clock.
See “XTAL Divide Control Register – XDIV” on page 43.
29
2467OS–AVR–10/06
ATMEL [ ATMEL ]
