ATmega128
5. Updated “Electrical Characteristics” on page 322.
6. Updated “ADC Characteristics” on page 328.
7. Updated “ATmega128 Typical Characteristics” on page 336.
8. Updated “Ordering Information” on page 14.
Changes from Rev.
2467J-12/03 to Rev.
2467K-03/04
1. Updated “Errata” on page 17.
Changes from Rev.
2467I-09/03 to Rev.
2467J-12/03
1. Updated “Calibrated Internal RC Oscillator” on page 41.
Changes from Rev.
2467H-02/03 to Rev.
2467I-09/03
1. Updated note in “XTAL Divide Control Register – XDIV” on page 43.
2. Updated “JTAG Interface and On-chip Debug System” on page 48.
3. Updated values for VBOT (BODLEVEL = 1) in Table 19 on page 50.
4. Updated “Test Access Port – TAP” on page 249 regarding JTAGEN.
5. Updated description for the JTD bit on page 258.
6. Added a note regarding JTAGEN fuse to Table 118 on page 291.
7. Updated RPU values in “DC Characteristics” on page 322.
8. Added a proposal for solving problems regarding the JTAG instruction
IDCODE in “Errata” on page 17.
Changes from Rev.
2467G-09/02 to Rev.
2467H-02/03
1. Corrected the names of the two Prescaler bits in the SFIOR Register.
2. Added Chip Erase as a first step under “Programming the Flash” on page 319
and “Programming the EEPROM” on page 320.
3. Removed reference to the “Multipurpose Oscillator” application note and the
“32 kHz Crystal Oscillator” application note, which do not exist.
4. Corrected OCn waveforms in Figure 52 on page 125.
5. Various minor Timer1 corrections.
6. Added information about PWM symmetry for Timer0 and Timer2.
7. Various minor TWI corrections.
8. Added reference to Table 124 on page 294 from both SPI Serial Programming
and Self Programming to inform about the Flash Page size.
27
2467OS–AVR–10/06