Table 13-21. Overriding Signals for Alternate Functions in PG5:PG4
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
—
–
–
–
–
–
–
–
–
–
–
–
—
–
–
–
–
–
–
–
–
–
–
–
PG5/OC0B
PG4/TOSC1
–
AS2
–
0
–
AS2
–
0
OC0B Enable
0
OC0B
0
–
–
–
–
–
–
AS2
EXCLK
–
AIO
T/C2 OSC INPUT
Table 13-22. Overriding Signals for Alternate Functions in PG3:PG0
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
PG3/TOSC2
PG2/ALE/A7
PG1/RD
PG0/WR
AS2 • EXCLK
SRE
0
SRE
0
SRE
0
0
AS2 • EXCLK
SRE
1
SRE
1
SRE
1
0
0
SRE
ALE
–
SRE
RD
–
SRE
WR
–
0
–
AS2 • EXCLK
0
0
0
0
0
0
0
–
–
–
–
AIO
T/C2 OSC OUTPUT
–
–
–
13.3.8
Alternate Functions of Port H
The Port H alternate pin configuration is as follows:
Table 13-23. Port H Pins Alternate Functions
Port Pin
PH7
Alternate Function
T4 (Timer/Counter4 Clock Input)
PH6
OC2B(Output Compare and PWM Output B for Timer/Counter2)
OC4C(Output Compare and PWM Output C for Timer/Counter4)
PH5
92
ATmega640/1280/1281/2560/2561
2549L–AVR–08/07
ATMEL [ ATMEL ]
