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ATMEGA2560-16AU-SL383 参数 Datasheet PDF下载

ATMEGA2560-16AU-SL383图片预览
型号: ATMEGA2560-16AU-SL383
PDF下载: 下载PDF文件 查看货源
内容描述: [Microcontroller, 8-Bit, FLASH, AVR RISC CPU, 16MHz, CMOS, PQFP100, 14 X 14 MM, 1 MM HEIGHT, 0.50 MM PITCH, GREEN, PLASTIC, MS-026AED, TQFP-100]
分类和应用: 时钟微控制器
文件页数/大小: 448 页 / 7518 K
品牌: ATMEL [ ATMEL ]
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ATmega640/1280/1281/2560/2561  
Figure 30-5. Mapping Between BS1, BS2 and the Fuse and Lock Bits During Read  
0
Fuse Low Byte  
Extended Fuse Byte  
Lock Bits  
0
1
1
0
DATA  
BS2  
BS1  
Fuse High Byte  
1
BS2  
30.7.13 Reading the Signature Bytes  
The algorithm for reading the Signature bytes is as follows (refer to “Programming the Flash” on  
page 343 for details on Command and Address loading):  
1. A: Load Command “0000 1000”.  
2. B: Load Address Low Byte (0x00 - 0x02).  
3. Set OE to “0”, and BS to “0”. The selected Signature byte can now be read at DATA.  
4. Set OE to “1”.  
30.7.14 Reading the Calibration Byte  
The algorithm for reading the Calibration byte is as follows (refer to “Programming the Flash” on  
page 343 for details on Command and Address loading):  
1. A: Load Command “0000 1000”.  
2. B: Load Address Low Byte, 0x00.  
3. Set OE to “0”, and BS1 to “1”. The Calibration byte can now be read at DATA.  
4. Set OE to “1”.  
30.7.15 Parallel Programming Characteristics  
Figure 30-6. Parallel Programming Timing, Including some General Timing Requirements  
tXLWL  
tXHXL  
XTAL1  
tDVXH  
tXLDX  
Data & Contol  
(DATA, XA0/1, BS1, BS2)  
tBVPH  
tPLBX tBVWL  
tWLBX  
PAGEL  
tPHPL  
tWLWH  
WR  
tPLWL  
WLRL  
RDY/BSY  
tWLRH  
349  
2549L–AVR–08/07  
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