ATmega640/1280/1281/2560/2561
Table 30-4. Fuse High Byte
Fuse High Byte
OCDEN(4)
JTAGEN
Bit No
Description
Enable OCD
Enable JTAG
Default Value
1 (unprogrammed, OCD
disabled)
7
6
5
4
3
0 (programmed, JTAG enabled)
Enable Serial Program and Data
Downloading
0 (programmed, SPI prog.
enabled)
SPIEN(1)
WDTON(3)
EESAVE
Watchdog Timer always on
1 (unprogrammed)
EEPROM memory is preserved
through the Chip Erase
1 (unprogrammed, EEPROM
not preserved)
Select Boot Size (see Table 30-9 for
details)
BOOTSZ1
2
0 (programmed)(2)
Select Boot Size (see Table 30-9 for
details)
BOOTSZ0
BOOTRST
1
0
0 (programmed)(2)
1 (unprogrammed)
Select Reset Vector
Notes: 1. The SPIEN Fuse is not accessible in serial programming mode.
2. The default value of BOOTSZ1:0 results in maximum Boot Size. See Table 29-7 on page 329
for details.
3. See “WDTCSR – Watchdog Timer Control Register” on page 67 for details.
4. Never ship a product with the OCDEN Fuse programmed regardless of the setting of Lock bits
and JTAGEN Fuse. A programmed OCDEN Fuse enables some parts of the clock system to
be running in all sleep modes. This may increase the power consumption.
Table 30-5. Fuse Low Byte
Fuse Low Byte
CKDIV8(4)
CKOUT(3)
SUT1
Bit No
Description
Default Value
7
6
5
4
3
2
1
0
Divide clock by 8
Clock output
0 (programmed)
1 (unprogrammed)
1 (unprogrammed)(1)
0 (programmed)(1)
0 (programmed)(2)
0 (programmed)(2)
1 (unprogrammed)(2)
0 (programmed)(2)
Select start-up time
Select start-up time
Select Clock source
Select Clock source
Select Clock source
Select Clock source
SUT0
CKSEL3
CKSEL2
CKSEL1
CKSEL0
Notes: 1. The default value of SUT1:0 results in maximum start-up time for the default clock source. See
“System and Reset Characteristics” on page 375 for details.
2. The default setting of CKSEL3:0 results in internal RC Oscillator @ 8 MHz. See Table 10-1 on
page 40 for details.
3. The CKOUT Fuse allow the system clock to be output on PORTE7. See “Clock Output Buffer”
on page 48 for details.
4. See “System Clock Prescaler” on page 49 for details.
The status of the Fuse bits is not affected by Chip Erase. Note that the Fuse bits are locked if
Lock bit1 (LB1) is programmed. Program the Fuse bits before programming the Lock bits.
339
2549L–AVR–08/07
ATMEL [ ATMEL ]
