ATmega640/1280/1281/2560/2561
30.6.1
Signal Names
In this section, some pins of the ATmega640/1280/1281/2560/2561 are referenced by signal
names describing their functionality during parallel programming, see Figure 30-1 and Table 30-
9. Pins not described in the following table are referenced by pin names.
The XA1/XA0 pins determine the action executed when the XTAL1 pin is given a positive pulse.
The bit coding is shown in Table 30-12.
When pulsing WR or OE, the command loaded determines the action executed. The different
commands are shown in Table 30-13.
Figure 30-1. Parallel Programming(Note:)
+5V
RDY/BSY
OE
PD1
PD2
PD3
PD4
PD5
PD6
PD7
VCC
+5V
WR
AVCC
BS1
PB7 - PB0
DATA
XA0
XA1
PAGEL
+12 V
BS2
RESET
PA0
XTAL1
GND
Note:
Unused Pins should be left floating.
Table 30-9. Pin Name Mapping
Signal Name in
Programming Mode
Pin Name
I/O
Function
0: Device is busy programming, 1: Device is ready for
new command.
RDY/BSY
PD1
O
OE
WR
PD2
PD3
PD4
PD5
PD6
PD7
PA0
I
Output Enable (Active low).
Write Pulse (Active low).
Byte Select 1.
I
BS1
I
XA0
I
XTAL Action Bit 0
XA1
I
I
XTAL Action Bit 1
PAGEL
BS2
Program Memory and EEPROM data Page Load.
Byte Select 2.
I
DATA
PB7-0
I/O
Bi-directional Data bus (Output when OE is low).
341
2549L–AVR–08/07
ATMEL [ ATMEL ]
