ATmega640/1280/1281/2560/2561
13.3.9
Alternate Functions of Port J
The Port J alternate pin configuration is as follows:
Table 13-26. Port J Pins Alternate Functions
Port Pin
Alternate Function
PJ7
–
PJ6
PJ5
PJ4
PJ3
PJ2
PJ1
PJ0
PCINT15 (Pin Change Interrupt 15)
PCINT14 (Pin Change Interrupt 14)
PCINT13 (Pin Change Interrupt 13)
PCINT12 (Pin Change Interrupt 12)
XCK3/PCINT11 (USART3 External Clock or Pin Change Interrupt 11)
TXD3/PCINT10 (USART3 Transmit Pin or Pin Change Interrupt 10)
RXD3/PCINT9 (USART3 Receive Pin or Pin Change Interrupt 9)
• PCINT15:12 - Port J, Bit 6:3
PCINT15:12, Pin Change Interrupt Source 15:12. The PJ6:3 pins can serve as External Interrupt
Sources
• XCK2/PCINT11 - Port J, Bit 2
XCK2, USART 2 External Clock. The Data Direction Register (DDJ2) controls whether the clock
is output (DDJ2 set) or input (DDJ2 cleared). The XCK2 pin is active only when the USART2
operates in synchronous mode.
PCINT11, Pin Change Interrupt Source 11. The PJ2 pin can serve as External Interrupt Sources
• TXD3/PCINT10 - Port J, Bit 1
TXD3, USART3 Transmit pin
PCINT10, Pin Change Interrupt Source 10. The PJ1 pin can serve as External Interrupt Sources
• RXD3/PCINT9 - Port J, Bit 0
RXD3, USART3 Receive pin. Receive Data (Data input pin for the USART3). When the
USART3 Receiver is enabled, this pin is configured as an input regardless of the value of DDJ0.
When the USART3 forces this pin to be an input, a logical one in PORTJ0 will turn on the inter-
nal pull-up.
PCINT9, Pin Change Interrupt Source 9. The PJ0 pin can serve as External Interrupt Sources
Table 2 and Table 3 relates the alternate functions of Port J to the overriding signals shown in
Figure 13-5 on page 76.
95
2549L–AVR–08/07
ATMEL [ ATMEL ]
