Memory Organization
MCS-51 devices have a separate address space for Pro-
gram and Data Memory. Up to 64K bytes each of external
Program and Data Memory can be addressed.
When an instruction accesses an internal location above
address 7FH, the address mode used in the instruction
specifies whether the CPU accesses the upper 128 bytes
of RAM or the SFR space. Instructions which use direct
addressing access of the SFR space.
Program Memory
If the EA pin is connected to GND, all program fetches are
directed to external memory.
For example, the following direct addressing instruction
accesses the SFR at location 0A0H (which is P2).
On the AT89S52, if EA is connected to VCC, program
fetches to addresses 0000H through 1FFFH are directed to
internal memory and fetches to addresses 2000H through
FFFFH are to external memory.
MOV 0A0H, #data
Instructions that use indirect addressing access the upper
128 bytes of RAM. For example, the following indirect
addressing instruction, where R0 contains 0A0H, accesses
the data byte at address 0A0H, rather than P2 (whose
address is 0A0H).
Data Memory
The AT89S52 implements 256 bytes of on-chip RAM. The
upper 128 bytes occupy a parallel address space to the
Special Function Registers. This means that the upper 128
bytes have the same addresses as the SFR space but are
physically separate from SFR space.
MOV @R0, #data
Note that stack operations are examples of indirect
addressing, so the upper 128 bytes of data RAM are avail-
able as stack space.
AT89S52
8
ATMEL [ ATMEL ]
